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AT89S8252_06 参数 Datasheet PDF下载

AT89S8252_06图片预览
型号: AT89S8252_06
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器8K字节的Flash [8-bit Microcontroller with 8K Bytes Flash]
分类和应用: 微控制器
文件页数/大小: 41 页 / 479 K
品牌: ATMEL [ ATMEL ]
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AT89S8252  
Serial Downloading  
Both the Code and Data memory arrays can be programmed using the serial SPI bus  
while RST is pulled to VCC. The serial interface consists of pins SCK, MOSI (input) and  
MISO (output). After RST is set high, the Programming Enable instruction needs to be  
executed first before program/erase operations can be executed.  
An auto-erase cycle is built into the self-timed programming operation (in the serial  
mode ONLY) and there is no need to first execute the Chip Erase instruction unless any  
of the lock bits have been programmed. The Chip Erase operation turns the content of  
every memory location in both the Code and Data arrays into FFH.  
The Code and Data memory arrays have separate address spaces:  
0000H to 1FFFH for Code memory and 000H to 7FFH for Data memory.  
Either an external system clock is supplied at pin XTAL1 or a crystal needs to be con-  
nected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency  
should be less than 1/40 of the crystal frequency. With a 24 MHz oscillator clock, the  
maximum SCK frequency is 600 kHz.  
Serial Programming  
Algorithm  
To program and verify the AT89S8252 in the serial programming mode, the following  
sequence is recommended:  
1. Power-up sequence:  
Apply power between VCC and GND pins.  
Set RST pin to “H”.  
If a crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to  
24 MHz clock to XTAL1 pin and wait for at least 10 milliseconds.  
2. Enable serial programming by sending the Programming Enable serial instruction to  
pin MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to  
be less than the CPU clock at XTAL1 divided by 40.  
3. The Code or Data array is programmed one byte at a time by supplying the address  
and data together with the appropriate Write instruction. The selected memory loca-  
tion is first automatically erased before new data is written. The write cycle is self-  
timed and typically takes less than 2.5 ms at 5V.  
4. Any memory location can be verified by using the Read instruction which returns the  
content at the selected address at serial output MISO/P1.6.  
5. At the end of a programming session, RST can be set low to commence normal  
operation.  
6. Power-off sequence (if needed):  
Set XTAL1 to “L” (if a crystal is not used).  
Set RST to “L”.  
Turn VCC power off.  
25  
0401G–MICRO–3/06  
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