DC Characteristics – 3.3V Operation Commercial/Industrial AT40KLV
Symbol
Parameter
Conditions
CMOS
TTL
Minimum
70% VCC
2.0
Typical
Maximum
Units
V
V
V
V
V
VIH
High-level Input Voltage
CMOS
TTL
-0.3
30% VCC
0.8
VIL
Low-level Input Voltage
High-level Output Voltage
-0.3
IOH = 4 mA
2.1
V
CC = VCC Minimum
IOH = 12 mA
CC = 3.0V
2.1
2.1
V
V
V
V
V
VOH
V
IOH = 16 mA
CC = 3.0V
V
IOL = -4 mA
0.4
0.4
0.4
V
CC = 3.0V
IOL = -12 mA
CC = 3.0V
VOL
Low-level Output Voltage
V
IOL = -16 mA
V
CC = 3.0V
V
IN = VCC Maximum
10.0
µA
µA
µA
µA
µA
IIH
High-level Input Current
Low-level Input Current
With pull-down, VIN = VCC
IN = VSS
75.0
-10.0
-300.0
150.0
300.0
V
IIL
With pull-up, VIN = VSS
Without pull-down,
-150.0
-75.0
10.0
V
IN = VCC Maximum
High-level Tri-state Output
Leakage Current
IOZH
With pull-down,
75.0
150.0
300.0
µA
VIN = VCC Maximum
Without pull-up, VIN = VSS
With pull-up, VIN = VSS
-10.0
mA
µA
Low-level Tri-state Output
Leakage Current
IOZL
CON = -500 µA
TO -125 µA
-150.0
0.6
CON = -500 µA
TO -125 µA-
ICC
Standby Current
Consumption
Standby, unprogrammed
All pins
1.0
mA
pF
CIN
Input Capacitance
10.0
Note:
1. Parameter based on characterization and simulation; it is not tested in production.
32
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
ATMEL [ ATMEL ]
