AT89C5115
Table 44. T2MOD Register
T2MOD (S:C9h)
Timer 2 Mode Control Register
7
-
6
-
5
-
4
-
3
-
2
-
1
0
T2OE
DCEN
Bit
Bit
Number
Mnemonic Description
Reserved
7
6
5
4
3
2
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
-
-
-
-
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Timer 2 Output Enable bit
1
0
T2OE
DCEN
Clear to program P1.0/T2 as clock input or I/O port.
Set to program P1.0/T2 as clock output.
Down Counter Enable bit
Clear to disable Timer 2 as up/down counter.
Set to enable Timer 2 as up/down counter.
Reset Value = XXXX XX00b
Not bit addressable
Table 45. TH2 Register
TH2 (S:CDh)
Timer 2 High Byte Register
7
-
6
-
5
-
4
-
3
-
2
-
1
-
0
-
Bit
Bit
Number
Mnemonic Description
7 - 0
High Byte of Timer 2
Reset Value = 0000 0000b
Not bit addressable
65
4128F–8051–05/06
ATMEL [ ATMEL ]
