Timer 2
The T89C5115 Timer 2 is compatible with Timer 2 in the 80C52.
It is a 16-bit timer/counter: the count is maintained by two eightbit timer registers, TH2
and TL2 that are cascade-connected. It is controlled by T2CON register (See Table 44)
and T2MOD register (See Table 45). Timer 2 operation is similar to Timer 0 and Timer
1. C/T2 selects FT2 clock/6 (timer operation) or external pin T2 (counter operation) as
timer clock. Setting TR2 allows TL2 to be incremented by the selected input.
Timer 2 includes the following enhancements:
•
•
Auto-reload mode (up or down counter)
Programmable clock-output
Auto-Reload Mode
The auto-reload mode configures Timer 2 as a 16-bit timer or event counter with auto-
matic reload. This feature is controlled by the DCEN bit in T2MOD register (See Table
44). Setting the DCEN bit enables Timer 2 to count up or down as shown in Figure 29. In
this mode the T2EX pin controls the counting direction.
When T2EX is high, Timer 2 counts up. Timer overflow occurs at FFFFh which sets the
TF2 flag and generates an interrupt request. The overflow also causes the 16-bit value
in RCAP2H and RCAP2L registers to be loaded into the timer registers TH2 and TL2.
When T2EX is low, Timer 2 counts down. Timer underflow occurs when the count in the
timer registers TH2 and TL2 equals the value stored in RCAP2H and RCAP2L registers.
The underflow sets TF2 flag and reloads FFFFh into the timer registers.
The EXF2 bit toggles when Timer 2 overflow or underflow, depending on the direction of
the count. EXF2 does not generate an interrupt. This bit can be used to provide 17-bit
resolution.
Figure 29. Auto-Reload Mode Up/Down Counter
See section “Clock”
FT2
:6
0
1
CLOCK
TR2
T2CON.2
CT/2
T2CON.1
T2
(DOWN COUNTING RELOAD VALUE)
T2EX:
FFh
(8-bit)
FFh
(8-bit)
1=UP
2=DOWN
T2CON Reg
EXF2
TOGGLE
TL2
(8-bit)
TH2
(8-bit)
TIMER 2
INTERRUPT
TF2
T2CON Reg
RCAP2L
(8-bit)
RCAP2H
(8-bit)
(UP COUNTING RELOAD VALUE)
62
AT89C5115
4128F–8051–05/06
ATMEL [ ATMEL ]
