Table 68. UFNUML Register
UFNUML (S:BAh, Read-only) – USB Frame Number Low Register
7
6
5
4
3
2
1
0
FNUM7
FNUM6
FNUM5
FNUM4
FNUM3
FNUM2
FNUM1
FNUM0
Bit
Number
Bit
Mnemonic Description
Frame Number
7 - 0
FNUM7:0
Lower 8 Bits of the 11-bit Frame Number.
Reset Value = 00h
Table 69. UFNUMH Register
UFNUMH (S:BBh, Read-only) – USB Frame Number High Register
7
-
6
-
5
4
3
-
2
1
0
CRCOK
CRCERR
FNUM10
FNUM9
FNUM8
Bit
Number
Bit
Mnemonic Description
Reserved
7 - 3
-
The values read from these Bits are always 0. Do not set these Bits.
Frame Number CRC OK Bit
Set by hardware after a non corrupted Frame Number in Start of Frame Packet is
received.
5
CRCOK
Updated after every Start Of Frame packet reception.
Note: The Start Of Frame interrupt is generated just after the PID receipt.
Frame Number CRC Error Bit
Set by hardware after a corrupted Frame Number in Start of Frame Packet is
received.
4
3
CRCERR
Updated after every Start Of Frame packet reception.
Note: The Start Of Frame interrupt is generated just after the PID receipt.
Reserved
The values read from this Bits are always 0. Do not set this bit.
-
Frame Number
FNUM10:8 Upper 3 Bits of the 11-bit Frame Number. It is provided in the last received SOF
packet. FNUM does not change if a corrupted SOF is received.
2 - 0
Reset Value = 00h
Table 70. USBCLK Register
USBCLK (S:EAh) – USB Clock Divider Register
7
-
6
-
5
-
4
-
3
-
2
-
1
0
USBCD1
USBCD0
Bit
Bit
Number
Mnemonic Description
Reserved
The values read from these Bits are always 0. Do not set these Bits.
7 - 2
-
80
AT89C5132
4173E–USB–09/07