Bit
Bit Number Mnemonic Description
Audio Data
8-bit sampling data for voice or sound playing.
7-0
AUD7:0
Reset Value = 1111 1111b
Table 55. AUDCLK Register
AUDCLK (S:ECh) – Audio Clock Divider Register
7
-
6
-
5
-
4
3
2
1
0
AUCD4
AUCD3
AUCD2
AUCD1
AUCD0
Bit
Bit Number Mnemonic Description
Reserved
The value read from these bits is always 0. Do not set these bits.
7-5
4-0
-
Audio Clock Divider
AUCD4:0
5-bit divider for audio clock generation.
Reset Value = 0000 0000b
66
AT89C5132
4173E–USB–09/07