Figure 14-4. Audio Output Format
Left Channel
Right Channel
DSEL
1
2
3
13
14
15
16
DCLK
DOUT
1
2
3
13
14
18
14
15
16
LSB MSB B14
B1 LSB MSB B14
I2S Format with DSIZ = 0 and JUST4:0 = 00001.
B1
Left Channel
Right Channel
DSEL
DCLK
DOUT
1
2
3
17
18
32
1
2
3
17
32
MSB B14
LSB
MSB B14
LSB
I2S Format with DSIZ = 1 and JUST4:0 = 00001.
Left Channel
Right Channel
DSEL
DCLK
DOUT
1
2
3
13
14
15
16
1
2
3
13
15
16
MSB B14
B1 LSB MSB B15
MSB/LSB Justified Format with DSIZ = 0 and JUST4:0 = 00000.
B1 LSB
Left Channel
16 17
Right Channel
16 17
DSEL
DCLK
DOUT
1
18
31
32
1
18
31
32
MSB B14
B1 LSB
MSB B14
B1 LSB
16-bit LSB Justified Format with DSIZ = 1 and JUST4:0 = 10000.
Left Channel
15 16
Right Channel
15 16
DSEL
DCLK
DOUT
1
30
31
32
1
30
31
32
B2
B1 LSB
B2
B1 LSB
MSB B16
MSB B16
18-bit LSB Justified Format with DSIZ = 1 and JUST4:0 = 01110.
As soon as first audio data is input to the data converter, it enables the clock generator for gen-
erating the bit and word clocks.
14.4 Audio Buffer
In voice or sound playing mode, the audio stream comes from the C51 core through an audio
buffer. The data is in 8-bit format and is sampled at 8 kHz. The audio buffer adapts the sample
format and rate. The sample format is extended to 16 bits by filling the LSB to 00h. Rate is
adapted to the DAC rate by duplicating the data using DUP1:0 bits in AUDCON1 register
according to Table 50.
The audio buffer interfaces to the C51 core through three flags: the sample request flag (SREQ
in AUDSTA register), the under-run flag (UNDR in AUDSTA register) and the busy flag
(AUBUSY in AUDSTA register). SREQ and UNDR can generate an interrupt request as
explained in Section "Interrupt Request", page 63. The buffer size is 8 Bytes large. SREQ is set
when the samples number switches from 4 to 3 and reset when the samples number switches
from 4 to 5; UNDR is set when the buffer becomes empty signaling that the audio interface ran
out of samples; and AUBUSY is set when the buffer is full.
62
AT89C5132
4173E–USB–09/07
ATMEL [ ATMEL ]
