AT85C51SND3Bx
Card Lock Input
As shown in Figure 83 the SMLCK (SMC/XD Lock) input implements an internal pull-up,
in order to provide static high level when card is not present in the socket.
SMLCK level is reported by SMLCK bit(1) in NFSTA register.
Note:
1. SDWP bit is not relevant until SMC management is enabled and a card is present in
the socket (SMCD = 0).
Figure 83. Card Write Protection Input Block Diagram
IOVDD
RPU
SMLCK
SMLCK
NFSTA.6
Interrupt Unit
As shown in Figure 84, the NF controller implements five interrupt sources reported in
SMCTI, ILGLI, ECCRDYI, ECCERRI, STOPI flags in NFINT register. These flags must
be cleared by software when processing the interrupt service routine.
All these sources are enabled separately using SMCTE, ILGLE, ECCRDYE,
ECCERRE, STOPE enable bits respectively in NFIEN register.
The interrupt request is generated each time an enabled flag is set, and the global NFC
controller interrupt enable bit is set (ENFC in IEN1 register).
Figure 84. NFC Controller Interrupt System
SMCTI
NFINT.4
SMCTE
NFIEN.4
ILGLI
NFINT.3
ILGLE
NFIEN.3
ECCRDYI
NFINT.2
NFC Controller
Interrupt Request
ECCRDYE
NFIEN.2
ECCERRI
NFINT.1
ENFC
IEN1.4
ECCERRI
NFIEN.1
STOPI
NFINT.0
STOPE
NFIEN.0
There are 2 kinds of interrupts: processing (i.e. their generation is part of the normal pro-
cessing) and exception (i.e. their generation correspond to error cases).
Processing interrupts are generated when:
•
•
•
running to not running state transition (STOPI)
ECC ready for operation (ECCRDYI)
SMC insertion or removal (SMCTI)
Exception Interrupts are generated when the following events are met:
ECC error (ECCERRI)
•
183
7632A–MP3–03/06
ATMEL [ ATMEL ]
