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85C51SND3BX01 参数 Datasheet PDF下载

85C51SND3BX01图片预览
型号: 85C51SND3BX01
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片数字音频解码器 - 编码器与USB 2.0接口 [Single-Chip Digital Audio Decoder - Encoder with USB 2.0 Interface]
分类和应用: 解码器编码器
文件页数/大小: 263 页 / 3620 K
品牌: ATMEL [ ATMEL ]
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AT85C51SND3Bx  
read the ECC FIFO, (keeping the ECCs in memory), re-initialize it, resume the data  
transfer, and to write all the ECC bytes at the end of the page.  
Logical Block Address  
In order to automatically and properly fill the spare zone, the logical block address must  
be provided to the NFC. This is done by writing a 2-bytes descriptor byte by byte to the  
NFLOG register according to Table 197. The first byte written is byte 0. The logical block  
addresses must be updated each time the data flow reaches the beginning of new logi-  
cal blocks.  
Table 197. Logical Block Address descriptor Content  
Byte  
Byte  
Offset  
Mnemonic Description  
0
1
LBAH  
LBAL  
Logical Block Address (MSB).  
Logical Block Address (LSB).  
Reset Value = 0000 0000b for each byte.  
In order to keep SMC compatibility, LBA will be organized as follow:  
0 0 0 1 0 A A A  
A A A A A A A P  
Header 00010b and parity “P” are handled by software. “A” represents the logical block  
address.  
End of Data Transfer  
When the data transfer stops, an interrupt is sent by the DFC macro to the CPU. The  
CPU has then to stop the NFC macro by sending a STOP action. This action can also  
be considered as an abort signal in a streaming mode. A STOP action makes the NFC  
return cleanly to the idle state (NFRUN cleared): it does not stop a spare area  
processing.  
End of Transfer Closing  
When the NFC stops following a STOP action, in the case of a write session, the user  
must properly stop the page programming by copying old sectors to the new page.  
Moreover, the spare zone shall also be managed by the software.  
To do this, the user needs to know where the NFC stopped: the NFBPH and NFBPL  
registers contain the byte position of the next data to be read or written. For example, it  
contains 0 after a reset, and 528 if the controller stops in a 512B page after the spare  
zone processing.  
This register is incremented each time a byte is read through NFDATF or written  
through NFDAT or NFDATF, spare zone included.  
A read of NFDAT or NFADC does not increment the NFBP counter.  
The NFBP counter can be updated by software. Anyway, this shall be done in debug  
mode, and only when the NFC is not running.  
Moreover, the NECC counter is updated when the controller reaches the end of the  
page. It gives the number of ECC that is ready to be written/updated. This feature shall  
be used when the flow does not start from the beginning of a page. For example, it con-  
tains 3 if the flow starts at offset 512 till the end of the page. In this situation, the three  
last ECC can be written/checked.  
Security Unit  
The Security Unit provides hardware mechanisms to protect NF content from any firm-  
ware crash and prevent data loss and provides data recovery capability through ECC  
management.  
179  
7632A–MP3–03/06  
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