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85C51SND3BX01 参数 Datasheet PDF下载

85C51SND3BX01图片预览
型号: 85C51SND3BX01
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片数字音频解码器 - 编码器与USB 2.0接口 [Single-Chip Digital Audio Decoder - Encoder with USB 2.0 Interface]
分类和应用: 解码器编码器
文件页数/大小: 263 页 / 3620 K
品牌: ATMEL [ ATMEL ]
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Bit  
Bit  
Number  
Mnemonic Description  
IN Data received  
Set by hardware when a new USB message is stored in the current bank of the  
Pipe. This triggers an interrupt if the RXINE bit is set in the UPIENX register.  
Shall be cleared to handshake the interrupt. Setting by software has no effect.  
0
RXINI  
Reset Value = 0000 0000b  
Table 149. UPIENX Register  
UPIENX (1.D2h) – USB Pipe Interrupt Enable Register  
7
6
5
4
3
2
1
0
FLERRE  
NAKEDE  
-
PERRE  
TXSTPE  
TXOUTE RXSTALLE  
RXINE  
Bit  
Bit  
Number  
Mnemonic Description  
Flow Error Interrupt enable  
7
FLERRE  
Set to enable the OVERFI and UNDERFI interrupts.  
Clear to disable the OVERFI and UNDERFI interrupts.  
NAK Handshake Received Interrupt Enable  
6
5
4
NAKEDE  
-
Set to enable the NAKEDI interrupt.  
Clear to disable the NAKEDI interrupt.  
Reserved  
The value read from this bit is always 0. Do not set this bit.  
PIPE Error Interrupt Enable  
PERRE  
Set to enable the PERRI interrupt.  
Clear to disable the PERRI interrupt.  
SETUP Bank ready Interrupt Enable  
3
2
1
0
TXSTPE  
TXOUTE  
RXSTALLE  
RXINE  
Set to enable the TXSTPI interrupt.  
Clear to disable the TXSTPI interrupt.  
OUT Bank ready Interrupt Enable  
Set to enable the TXOUTI interrupt.  
Clear to disable the TXOUTI interrupt.  
STALL Received Interrupt Enable  
Set to enable the RXSTALLI interrupt.  
Clear to disable the RXSTALLI interrupt.  
IN Data received Interrupt Enable  
Set to enable the RXINI interrupt.  
Clear to disable the RXINI interrupt.  
Reset Value = 0000 0000b  
Table 150. UPDATX Register  
UPDATX (1.D3h) – USB Pipe Data Register  
7
6
5
4
3
2
1
0
PDAT7  
PDAT6  
PDAT5  
PDAT4  
PDAT3  
PDAT2  
PDAT1  
PDAT0  
146  
AT85C51SND3Bx  
7632A–MP3–03/06  
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