Table 153. UPINT Register
UPINT (1.D6h) – USB Pipe IN Number Of Request Register
7
6
5
4
3
2
1
0
-
PINT6
PINT5
PINT4
PINT3
PINT2
PINT1
PINT0
Bit
Bit
Number
Mnemonic Description
Reserved
7
-
The value read from this bit is always 0. Do not set this bit.
Pipe Interrupts Bits
Set by hardware when an interrupt is triggered by the UPINTX register and if the
corresponding endpoint interrupt enable bit is set.
6-0
PINT6:0
Cleared by hardware when the interrupt source is served.
Reset Value = 0000 0000b
148
AT85C51SND3Bx
7632A–MP3–03/06