Table 140. UPRST Register
UPRST (1.CAh) – USB Host Pipe Reset Register
7
6
5
4
3
2
1
0
-
P6RST
P5RST
P4RST
P3RST
P2RST
P1RST
P0RST
Bit
Bit
Number
Mnemonic Description
Reserved
7
6
5
4
3
2
1
0
-
The value read from this bit is always 0. Do not set this bit.
Pipe 6 Reset
P6RST
P5RST
P4RST
P3RST
P2RST
P1RST
P0RST
Set this bit to 1 and reset this bit to 0 to reset the Pipe 6.
Pipe 5 Reset
Set this bit to 1 and reset this bit to 0 to reset the Pipe 5.
Pipe 4 Reset
Set this bit to 1 and reset this bit to 0 to reset the Pipe 4.
Pipe 3 Reset
Set this bit to 1 and reset this bit to 0 to reset the Pipe 3.
Pipe 2 Reset
Set this bit to 1 and reset this bit to 0 to reset the Pipe 2.
Pipe 1 Reset
Set this bit to 1 and reset this bit to 0 to reset the Pipe 1.
Pipe 0 Reset
Set this bit to 1 and reset this bit to 0 to reset the Pipe 0.
Reset Value = 0000 0000b
Table 141. UPCONX Register
UPCONX (1.CBh) – USB Host Pipe Control Register
7
6
5
4
3
2
1
0
-
PFREEZE
INMODE
AUTOSW
RSTDT
PNUM
DFCRDY
PEN
Bit
Bit
Number
Mnemonic Description
Reserved
7
6
-
The value read from this bit is always 0. Do not set this bit.
Pipe Freeze
Set this bit to Freeze the Pipe requests generation.
Clear this bit to enable the Pipe request generation.
This bit is set by hardware when:
PFREEZE
- the pipe is not configured
- a STALL handshake has been received on this Pipe
- An error occurs on the Pipe (PERR = 1)
- (INRQ+1) In requests have been processed
This bit is set at 1 by hardware after a Pipe reset or a Pipe enable.
140
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
