AT85C51SND3Bx
Bit
Bit
Number
Mnemonic Description
IN Request mode
Set this bit to allow the USB controller to perform infinite IN requests when the
Pipe is not frozen.
5
INMODE
Clear this bit to perform a pre-defined number of IN requests. This number is
stored in the UINRQX register.
Auto Switch Bank
4
3
2
AUTOSW
RSTDT
Set this bit to allow the auto switch bank mode for this Pipe.
Clear this bit to otherwise.
Reset Data Toggle
Set this bit to reset the Data Toggle to its initial value for the current Pipe.
Cleared by hardware when proceed. Clearing by software has no effect.
Pipe Number Select Bit
PNUMS
Set to configure the PNUM used by the DFC.
Clear to configure the PNUM used by the CPU.
DFC Ready Bit
1
0
DFCRDY Set to resume/enable the DFC interface.
Clear to pause the DFC interface.
Pipe Enable
PEN
Set to enable the Pipe.
Clear to disable and reset the Pipe.
Reset Value = 0000 0000b
Table 142. UPCFG0X Register
UPCFG0X (1.CCh) – USB Pipe Configuration 0 Register
7
6
5
4
3
2
1
0
PTYPE1
PTYPE0
PTOKEN1 PTOKEN0 PEPNUM3 PEPNUM2 PEPNUM1 PEPNUM0
Bit
Bit
Number
Mnemonic Description
Pipe Type
Select the type of the Pipe:
- 00: Control
- 01: Isochronous
- 10: Bulk
7-6
PTYPE1:0
- 11: Interrupt
Pipe Token
Select the Token to associate to the Pipe:
- 00: SETUP
- 01: IN
- 10: OUT
5-4
3-0
PTOKEN1:0
PEPNUM3:0
- 11: reserved
Pipe Endpoint Number
Set this field according to the Pipe configuration. Set the number of the Endpoint
targeted by the Pipe. This value is from 0 and 15.
Reset Value = 0000 0000b
141
7632A–MP3–03/06
ATMEL [ ATMEL ]
