Registers
General USB Host Registers
Table 132. UHCON Register
UHCON (1.D9h) – USB Host General Control Register
7
6
5
4
3
2
1
0
-
-
-
-
-
RESUME
RESET
SOFE
Bit
Bit
Number
Mnemonic Description
Reserved
7-3
2
-
The value read from these bits is always 0. Do not set these bits.
Send USB Resume
Set this bit to generate a USB Resume on the USB bus.
Cleared by hardware when the USB Resume has been sent. Clearing by
software has no effect.
RESUME
RESET
SOFE
Send USB Reset
Set this bit to generate a USB Reset on the USB bus.
Cleared by hardware when the USB Reset has been sent. Clearing by software
has no effect.
1
0
Refer to the USB reset section for more details.
Start Of Frame Generation Enable
Set this bit to generate SOF on the USB bus.
Clear this bit to disable the SOF generation and to leave the USB bus in Idle
state.
Reset Value = 0000 0000b
Table 133. UHINT Register
UHINT (1.D8h) – USB Host General Interrupt Register
7
6
5
4
3
2
1
0
-
HWUP
HSOF
RXRSMI
RSMEDI
RSTI
DDISCI
DCONNI
Bit
Bit
Number
Mnemonic Description
Reserved
7
6
-
The value read from this bit is always 0. Do not set this bit.
Host Wake-Up Interrupt
Set by hardware when a non-idle state is detected on the USB bus.
Shall be clear by software to acknowledge the interrupt. Setting by software has
no effect.
HWUP
HSOFI
Host Start Of Frame Interrupt
Set by hardware when a SOF is issued by the Host controller. This triggers a
USB interrupt when HSOFE is set.
5
Shall be cleared by software to acknowledge the interrupt. Setting by software
has no effect.
136
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
