AT8xC51SND2C
Registers
Table 178. AUXCON Register
AUXCON (S:90h) – Auxiliary Control Register
7
6
5
-
4
3
2
1
0
SDA
SCL
AUDCDOUT AUDCDIN AUDCCLK AUDCCS
KIN0
Bit
Bit
Number
Mnemonic
Description
TWI Lines
7:6
Refer to TWI section.
Audio DAC Control
5:1
0
Refer to Audio DAC section.
KIN0
Keyboard Input Interrupt.
Reset Value = 1111 1111b
Table 179. KBCON Register
KBCON (S:A3h) – Keyboard Control Register
7
-
6
-
5
-
4
3
-
2
-
1
-
0
KINL0
KINM0
Bit
Bit
Number
Mnemonic Description
Reserved
Do not set these bits.
7 - 5
4
-
Keyboard Input Level Bit
Set to enable a high level detection on the respective KIN0 input.
Clear to enable a low level detection on the respective KIN0 input.
KINL0
-
Reserved
Do not reset these bits.
3 - 1
0
Keyboard Input Mask Bit
Set to prevent the respective KINF3:0 flag from generating a keyboard interrupt.
Clear to allow the respective KINF3:0 flag to generate a keyboard interrupt.
KINM0
Reset Value = 0000 1111b
Table 180. KBSTA Register
KBSTA (S:A4h) – Keyboard Control and Status Register
7
6
-
5
-
4
-
3
-
2
-
1
-
0
KPDE
KINF0
Bit
Bit
Number
Mnemonic Description
Keyboard Power Down Enable Bit
7
KPDE
Set to enable exit of power down mode by the keyboard interrupt.
Clear to disable exit of power down mode by the keyboard interrupt.
199
4341D–MP3–04/05
ATMEL [ ATMEL ]
