AT8xC51SND2C
Figure 98. Data Block Transmission Flows
Data Block
Data Block
Data Block
Transmission
Initialization
Transmission ISR
FIFOs Filling
write 16 data to MMDAT
FIFOs Filling
write 16 data to MMDAT
FIFO Empty?
F1EI or F2EI = 1?
Start Transmission
DATEN = 1
Unmask FIFOs Empty
F1EM = 0
DATEN = 0
F2EM = 0
FIFO Filling
write 8 data to MMDAT
Start Transmission
DATEN = 1
FIFO Empty?
F1EI or F2EI = 1?
No More Data
To Send?
DATEN = 0
FIFO Filling
write 8 data to MMDAT
Mask FIFOs Empty
F1EM = 1
F2EM = 1
No More Data
To Send?
b. Interrupt mode
a. Polling mode
Data Receiver
Configuration
To receive data from the card you must first configure the data controller in reception
mode by clearing the DATDIR bit in MMCON1 register.
Figure 99 summarizes the data stream reception flows in both polling and interrupt
modes while Figure 100 summarizes the data block reception flows in both polling and
interrupt modes, these flows assume that block length is greater than 16 Bytes.
Data Reception
The end of a data frame (block or stream) reception is signalled to you by the EOFI flag
in MMINT register. This flag may generate an MMC interrupt request as detailed in Sec-
tion "Interrupt", page 150. When this flag is set, 2 other flags in MMSTA register: DATFS
and CRC16S give a status on the frame received. DATFS indicates if the frame format
is correct or not: a valid End bit has been received, and CRC16S indicates if the CRC16
computation is correct or not. In case of data stream CRC16S has no meaning and
stays cleared.
According to the MMC specification data transmission from the card starts after the
access time delay (formally NAC parameter) beginning from the End bit of the read com-
mand. To avoid any locking of the MMC controller when card does not send its data
(e.g. physically removed from the bus), you must launch a time-out period to exit from
such situation. In case of time-out you may reset the data controller and its internal state
machine by setting and clearing the DCR bit in MMCON2 register.
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4341D–MP3–04/05
ATMEL [ ATMEL ]
