AT8xC51SND2C
Bulk/Interrupt OUT
Transactions in Ping-pong
Mode
Figure 71. Bulk/Interrupt OUT Transactions in Ping-pong Mode
HOST
UFI
C51
OUT DATA0 (n Bytes)
ACK
RXOUTB0
Endpoint FIFO bank 0 - Read Byte 1
Endpoint FIFO bank 0 - Read Byte 2
DATA1 (m Bytes)
OUT
ACK
ACK
Endpoint FIFO bank 0 - Read Byte n
Clear RXOUTB0
RXOUTB1
RXOUTB0
OUT DATA0 (p Bytes)
Endpoint FIFO bank 1 - Read Byte 1
Endpoint FIFO bank 1 - Read Byte 2
Endpoint FIFO bank 1 - Read Byte m
Clear RXOUTB1
Endpoint FIFO bank 0 - Read Byte 1
Endpoint FIFO bank 0 - Read Byte 2
Endpoint FIFO bank 0 - Read Byte p
Clear RXOUTB0
An endpoint should be first enabled and configured before being able to receive Bulk or
Interrupt packets.
When a valid OUT packet is received on the endpoint bank 0, the RXOUTB0 bit is set by
the USB controller. This triggers an interrupt if enabled. The firmware has to select the
corresponding endpoint, store the number of data Bytes by reading the UBYCTX regis-
ter. If the received packet is a ZLP (Zero Length Packet), the UBYCTX register value is
equal to 0 and no data has to be read.
When all the endpoint FIFO Bytes have been read, the firmware should clear the
RXOUB0 bit to allow the USB controller to accept the next OUT packet on the endpoint
bank 0. This action switches the endpoint bank 0 and 1. Until the RXOUTB0 bit has
been cleared by the firmware, the USB controller will answer a NAK handshake for each
OUT requests on the bank 0 endpoint FIFO.
When a new valid OUT packet is received on the endpoint bank 1, the RXOUTB1 bit is
set by the USB controller. This triggers an interrupt if enabled. The firmware empties the
bank 1 endpoint FIFO before clearing the RXOUTB1 bit. Until the RXOUTB1 bit has
been cleared by the firmware, the USB controller will answer a NAK handshake for each
OUT requests on the bank 1 endpoint FIFO.
The RXOUTB0 and RXOUTB1 bits are, alternatively, set by the USB controller at each
new valid packet receipt.
The firmware has to clear one of these 2 bits after having read all the data FIFO to allow
a new valid packet to be stored in the corresponding bank.
A NAK handshake is sent by the USB controller only if the banks 0 and 1 has not been
released by the firmware.
111
4341D–MP3–04/05
ATMEL [ ATMEL ]
