AT8xC51SND2C
Configuration
General Configuration
•
•
USB controller enable
Before any USB transaction, the 48 MHz required by the USB controller must be
correctly generated (See “Clock Controller” on page 19).
The USB controller should be then enabled by setting the EUSB bit in the USBCON
register.
Set address
After a Reset or a USB reset, the software has to set the FEN (Function Enable) bit
in the USBADDR register. This action will allow the USB controller to answer to the
requests sent at the address 0.
When a SET_ADDRESS request has been received, the USB controller must only
answer to the address defined by the request. The new address should be stored in
the USBADDR register. The FEN bit and the FADDEN bit in the USBCON register
should be set to allow the USB controller to answer only to requests sent at the new
address.
•
•
Set configuration
The CONFG bit in the USBCON register should be set after a
SET_CONFIGURATION request with a non-zero value. Otherwise, this bit should
be cleared.
Endpoint Configuration
Selection of an Endpoint
The endpoint register access is performed using the UEPNUM register. The
registers
–
–
–
–
UEPSTAX
UEPCONX
UEPDATX
UBYCTX
Theses registers correspond to the endpoint whose number is stored in the UEP-
NUM register. To select an Endpoint, the firmware has to write the endpoint number
in the UEPNUM register.
Figure 68. Endpoint Selection
SFR Registers
UEPSTA0
UEPCON0
UEPDAT0
UEPDAT2
0
1
Endpoint 0
UBYCT0
UEPSTAX
UEPCONX
UBYCTX
UEPDATX
X
UEPSTA2
UEPCON2
2
Endpoint 2
UBYCT2
UEPNUM
107
4341D–MP3–04/05
ATMEL [ ATMEL ]
