TS68882
This interface is quite flexible and allows any addressing mode to be used with floating-
point instructions. For the TS68000 Family, these addressing modes include immediate,
postincrement, predecrement, data or address register direct, and the indexed/indirect
addressing modes of the TS68020/TS68030. Some addressing modes are restricted for
some instructions in keeping with the TS68000 Family architectural definitions (i.e., PC
relative addressing is not allowed for a destination operand).
The orthogonal instruction set of the TS68882, along with the flexible branches and
addressing modes, allows a programmer writing assembly language code, or a compiler
writer generating object or source code for the MPU/TS68882 device pair, to think of the
TS68882 as though it is part of the MPU. There are no special restrictions imposed by
the co-processor interface, and floating-point arithmetic is coded exactly like integer
arithmetic.
Address Bus (A0 through These active-high address line inputs are used by the main processor to select the co-
processor interface register locations located in the CPU address space. These lines
control the register selection as listed in Table 10.
A4)
When the TS68882 is configured to operate over an 8-bit data bus, the A0 pin is used as
an address signal for byte accesses of the co-processor interface registers. When the
TS68882 is configured to operate over a 16- or 32-bit system data bus, both the A0 and
SIZE pins are strapped high and/or low as listed in Table 11.
Table 10. Co-processor Interface Register Selection
A4-A0
0000x
0001x
0010x
0011x
0100x
0101x
0110x
0111x
100xx
1010x
1011x
110xx
111xx
Offset
S00
S02
S04
S06
S08
S0A
S0C
S0E
S10
S14
S16
S18
S1C
Width
16
Type
Read
Write
Read
R/W
-
Register
Response
Control
16
16
Save
16
Restore
16
(Reserved)
Command
(Reserved)
Condition
16
Write
-
16
16
Write
R/W
Read
-
32
Operand
16
Register select
(Reserved)
Instruction Address
Operand Address
16
32
Read
R/W
32
Table 11. System Data Bus Size Configuration
A0
Size
Low
High
High
Data bus
8-bit
Low
16-bit
High
32-bit
31
2119A–HIREL–04/02
ATMEL [ ATMEL ]
