AT7908E
AC Characteristics
Tj = 125 °C, Process typical (all values in ns)
Tp
Tp
Set Up
Output Signals
Buffer Description
Load
Xtalin to Output High
Xtalin to Output Low
or Hold
Can_tx
Int
29
BOUT6: Output buffer with 6
mA drive
Hasync
Hatrig
75 pF
75 pF
25
26
19
Set up Data<7:0>/Ale
Hold Data<7:0>/Ale
5
6
BIOC6: Bi-directional Buffer
CMOS input
Power Consumption
Parameter
Max
Min
Note
DC Curent
Dissipation
50 mA @ 5V
-
CLK frequency = 16 MHz
Technology
Application
MG2RTP 0.5 mm 3 Metal Layers Sea of Gate.
Matrix: MG2 –044: 33K usable gates.
Package: MLCC_J44: Ceramic Multi layer Package
The core architecture has been implemented taking into account the typical constraints
of a space application:
•
•
•
•
•
No Single Event Latch-up below a LET Threshold of 80 MeV/mg/cm2
Tested up to a Total Dose of 300 Krads(si) According to MIL STD 883 Method 1019
Design using the SEU hardened flip flops
Sleep mode for low power consumption
Insertion of test structures (internal scan chain) to reach a fault coverage > 95%
according to ESA specification
5
4268D–AERO–11/09
ATMEL [ ATMEL ]
