Figure 4. ICC Test Condition, Idle Mode
VCC
ICC
VCC
Reset = Vss after a high pulse
during at least 24 clock cycles
VCC
P0
EA
RST
(NC)
CLOCK
SIGNAL
XTAL2
XTAL1
VSS
All other pins are disconnected.
Figure 5. ICC Test Condition, Power-Down Mode
VCC
ICC
VCC
VCC
Reset = Vss after a high pulse
during at least 24 clock cycles
P0
EA
RST
XTAL2
XTAL1
(NC)
VSS
All other pins are disconnected.
Figure 6. Clock Signal Waveform for ICC Tests in Active and Idle Modes
VCC-0.5V
0.7VCC
0.2VCC-0.1
0.45V
TCLCH
TCHCL
TCLCH = TCHCL = 5ns.
AC Parameters
Each timing symbol has 5 characters. The first character is always a “T” (stands for
time). The other characters, depending on their positions, stand for the name of a signal
or the logical status of that signal. The following is a list of all the characters and what
they stand for.
Example:TAVLL = Time for Address Valid to ALE Low.
TLLPL = Time for ALE Low to PSEN Low.
TA = -55°C to +125°C (Military temperature range); VSS = 0 V; VCC = 5 V ± 10%;
12
80C32E
Rev. K – 21-Aug-01
ATMEL [ ATMEL ]
