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AT8563 参数 Datasheet PDF下载

AT8563图片预览
型号: AT8563
PDF下载: 下载PDF文件 查看货源
内容描述: [AT8563是一款经典的工业级实时时钟芯片(RTC),I2C总线接口,具有功耗低、精度高等特点,广泛应用于电表、水表、气表、电话等产品。]
分类和应用: 电话时钟
文件页数/大小: 24 页 / 729 K
品牌: ATM [ ADVANCED TECHNICAL MATERIALS INC. ]
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Torwards
AT8563
2.7.1 Control/Status 1 register
Table 6
00H
b7
b5
Symbol
TEST1
STOP
Control/Status 1 register bits description
Description
TEST1 = 0; normal mode.
TEST1 = 1; EXT_CLK test mode; see Section 8.7.
STOP = 0; RTC source clock runs.
STOP = 1; all RTC divider chain flip-flops are asynchronously set to logic 0; the
RTC clock is stopped (CLKOUT at 32.768 kHz is still available).
TESTC = 0; power-on reset override facility is disabled (set to logic 0 for normal
operation).
TESTC = 1; power-on reset override is enabled.
By default set to logic 0.
b3
b6, b4,
b2..0
TESTC
-
2.7.2 Control/Status 2 register
Table 7
01H
b7..5
b4
Symbol
0
TI/TP
By default set to logic 0
TI/TP = 0: INT is active when TF is active (subject to the status of TIE).
TI/TP = 1: INT pulses active according to Table 8 (subject to the status of TIE). Note
that if AF and AIE are active then INT will be permanently active.
When an alarm occurs, AF is set to logic 1. Similarly, at the end of a timer
countdown, TF is set to logic 1. These bits maintain their value until overwritten by
software. If both timer and alarm interrupts are required in the application, the source
of the interrupt can be determined by reading these bits. To prevent one flag being
overwritten while clearing another, a logic AND is performed during a write access.
See Table 9 for the value descriptions of bits AF and TF.
Bits AIE and TIE activate or deactivate the generation of an interrupt when AF or TF
is asserted, respectively. The interrupt is the logical OR of these two conditions
when both AIE and TIE are set.
AIE = 0: alarm interrupt disabled; AIE = 1: alarm interrupt enabled.
TIE = 0: timer interrupt disabled; TIE = 1: timer interrupt enabled.
———
Description of Control/Status 2 register bits description
Description
b3
b2
b1
b0
AF
TF
AIE
TIE
Table 8 INT operation (bit TI/TP = 1)
INT period(s)
Source clock (Hz)
———
n=1
4096
64
1
1/60
Note:
[1] TF and INT become active simultaneously.
[2] n = loaded countdown timer value. Timer stopped when n = 0.
———
n>1
1/4096
1/64
1/64
1/64
1/8192
1/128
1/64
1/64
6
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