Torwards
AT8563
These bits represents the day alarm information coded in BCD
format; value = 01 to 31.
b6..0
<day alarm>
Table 22 Weekday alarm register bits description
Symbol Description
0CH
b7
———
———
AE= 0; weekday alarm is enabled.
———
AE
AE= 1; weekday alarm is disabled.
These bits represents the weekday alarm information
value 0 to 6.
b6..0 <Weekday alarm>
2.7.6 CLKOUT frequency register
Table 23 CLKOUT frequency register bits description
0DH
Symbol
Description
FE = 0; the CLKOUT output is inhibited and the CLKOUT output is set to
high-impedance. FE = 1; the CLKOUT output is activated.
b7
FE
-
b6..2
not implemented
b1
b0
FD1
FD0
These bits control the frequency output (fCLKOUT) on the CLKOUT pin; see
Table 24.
Table 24 CLKOUT frequency selection
FD1 FD0
fCLKOUT
32.768 kHz
1 024 Hz
32 Hz
0
0
1
1
0
1
0
1
1 Hz
2.7.7 Countdown timer registers
The Timer register is an 8-bit binary countdown timer. It is enabled and disabled via the
Timer control register bit TE. The source clock for the timer is also selected by the Timer
control register. Other timer properties, e.g. interrupt generation, are controlled via the
Control/status 2 register. For accurate read back of the countdown value, the I2C-bus clock
SCL must be operating at a frequency of at least twice the selected timer clock.
Table 25 Timer control register bits description
Symbol
Description
TE = 0; timer is disabled. TE = 1; timer is enabled.
not implemented
0EH
b7
TE
-
b6～b2
•
10
•
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