AX88196
Local CPU BUS MAC Controller
6.4.5 68K Type I/O Access Timing
Tsu(A)
Th(A)
SA[9:1],SAL,SAH
Tv(DS-WR)
Tw(DS)
Tdis(WR-DS)
/UDS,/LDS
(Read)
R/W
Ten(DS)
(Write)
R/W
Tv(DTACK)
Tdis(DTACK)
Tdis(DS)
/DTACK
(Read Data)
SD[15:0](Dout)
DATA Valid
Tsu(DS)
Th(DS)
(Write Data)
SD[15:0](Din)
DATA Input Establish
Symbol
Tsu(A)
Description
ADDRESS SETUP TIME
Min
0
5
0
5
-
0
-
0.5
5
Typ.
Max
-
-
-
-
20
-
20
4
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
-
-
-
-
Th(A)
ADDRESS HOLD TIME
Tv(DS-WR)
/UDS OR /LDS VALID FROM /W
Tdis(WR-DS) /W DISABLE FROM /UDS OR /LDS
Tv(DTACK) DACK VALID FROM /UDS OR /LDS
Tdis(DTACK) DACK DISABLE FROM /UDS OR /LDS
Ten(DS)
Tdis(DS)
Tsu(DS)
Th(DS)
OUTPUT ENABLE TIME FROM /UDS OR /LDS
OUTPUT DISABLE TIME FROM /UDS OR /LDS
DATA SETUP TIME
ns
ns
DATA HOLD TIME
5
-
Tw(DS)
/UDS OR /LDS WIDTH TIME
*60
ns
*Note : 60 ns at internal operation clock is 20MHz.
50 ns at internal operation clock is 25MHz.
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ASIX ELECTRONICS CORPORATION