AX88196
Local CPU BUS MAC Controller
6.4.4 80186 Type I/O Access Timing
Tsu(A)
Th(A)
/BHE
SA[9:0],SAL,SAH
/IOWR,/IORD
RDY
Tw(RW)
Tv(RDY)
Tdis(RDY)
Ten(RD)
Tsu(WR)
Tdis(RD)
DATA Valid
Read Data
SD[15:0](Dout)
Th(WR)
Write Data
SD[15:0](Din)
DATA Input Establish
Symbol
Tsu(A)
Description
ADDRESS SETUP TIME
Min
0
5
-
0
-
0.5
5
5
*60
Typ.
Max
-
-
20
-
20
4
Units
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
-
-
Th(A)
ADDRESS HOLD TIME
Tv(RDY)
Tdis(RDY)
Ten(RD)
Tdis(RD)
Tsu(WR)
Th(WR)
Tw(RW)
RDY VALID FROM /IORD OR /IOWR
RDY DISABLE FROM /IORD OR /IOWR
OUTPUT ENABLE TIME FROM /IORD
OUTPUT DISABLE TIME FROM /IORD
DATA SETUP TIME
-
-
DATA HOLD TIME
/IORD OR /IOWR WIDTH TIME
ns
*Note : 60 ns at internal operation clock is 20MHz.
50 ns at internal operation clock is 25MHz.
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ASIX ELECTRONICS CORPORATION
ASIX [ ASIX ELECTRONICS CORPORATION ]
