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PEEL18LV8ZTI-15L 参数 Datasheet PDF下载

PEEL18LV8ZTI-15L图片预览
型号: PEEL18LV8ZTI-15L
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS可编程电可擦除逻辑器件 [CMOS Programmable Electrically Erasable Logic Device]
分类和应用: 可编程逻辑光电二极管时钟
文件页数/大小: 10 页 / 231 K
品牌: ANACHIP [ ANACHIP CORP ]
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100  
10  
programmed. Once the security bit is set it is impossible to  
verify (read) or program the PEEL until the entire device  
has first been erased with the bulk-erase function.  
Signature Word  
ICC  
The signature word feature allows a 64-bit code to be  
programmed into the PEEL18LV8Z if the software option is  
used. The code can be read back even after the security  
bit has been set. The signature word can be used to  
identify the pattern programmed into the device or to  
record the design revision, etc.  
in  
1
mA  
0.1  
Programming Support  
0.01  
0.01  
0.1  
1
10  
100  
Anachip's JEDEC file translator allows easy conversion of  
existing 20 pin PLD designs to the PEEL18LV8Z, without  
the need for redesign. Anachip also offers (for free) its  
proprietary PLACE software, an easy-to-use entry level  
PC-based software development system.  
Frequency in MHz  
Figure 6 - Typical ICC vs. Input Clock Frequency for  
the 18LV8Z  
Design Security  
Programming support includes all the popular third party  
programmers such as BP Microsystems, System General,  
The PEEL18LV8Z provides a special EEPROM security bit  
that prevents unauthorized reading or copying of designs  
programmed into the device. The PLD programmer sets  
the security bit, either at the conclusion of the programming  
cycle or as a separate step, after the device has been  
Logic  
Devices  
and  
numerous  
others.  
Anachip Corp.  
www.anachip.com.tw  
Rev. 1.0 Dec 16, 2004  
6/10  
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