AMS73CAG01808RA
-H7 (DDR3-1066)
-I9 (DDR3-1333)
Parameter
DQS input low pulse width
DQS output high time
Symbol
tDQSL
tQSH
Min
0.45
0.38
0.38
4
Max
Min
0.45
0.40
0.40
4
Max
Unit
tCK(avg)
tCK(avg)
tCK(avg)
nCK
Note
26,28
12,13
12,13
0.55
0.55
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DQS output low time
tQSL
Mode register set command cycle time
tMRD
Mode register set command update
delay
15
15
ns
tMOD
12
12
nCK
13,19
11,13
1
Read preamble time
Read postamble time
Write preamble time
Write postamble time
Write recovery time
tRPRE
tRPST
tWPRE
tWPST
tWR
0.9
0.3
0.9
0.3
15
0.9
0.3
0.9
0.3
15
tCK(avg)
tCK(avg)
tCK(avg)
tCK(avg)
ns
1
Auto precharge write recovery
+ Precharge time
tDAL(min)
WR + roundup [tRP / tCK(avg)]
nCK
22
18
18
Multi-purpose register recovery time
Internal write to read command delay
tMPRR
1
7.5
4
-
-
-
-
-
-
1
7.5
4
-
-
-
-
-
-
nCK
ns
tWTR
nCK
ns
Internal read to precharge command
delay
7.5
4
7.5
4
tRTP
nCK
Minimum CKE low width for Self-refresh
entry to exit timing
tCKE(min)
+1nCK
tCKE(min)
+1nCK
tCKESR
Valid clock requirement after Self-
refresh entry or Power-down entry
10
5
-
-
-
-
-
10
5
-
-
-
-
-
ns
nCK
ns
tCKSRE
Valid clock requirement before Self-
refresh exit or Power-down exit
10
5
10
5
tCKSRX
nCK
tRFC(min)
+10
tRFC(min)
+10
ns
Exit Self-refresh to commands
not requiring a locked DLL
tXS
5
-
-
5
-
-
nCK
nCK
Exit Self-refresh to commands
requiring a locked DLL
tXSDLL
tRFC
tREFI
tREFI
tDLLK
(min)
tDLLK
(min)
Auto-refresh to Active/Auto-refresh
command time
110
-
110
-
ns
μs
μs
Average Periodic Refresh Interval
0°C < Tc < +85°C
-
-
7.8
3.9
-
-
7.8
3.9
Average Periodic Refresh Interval
+85°C < Tc < +95°C
5.625
3
-
-
-
5.625
3
-
-
-
ns
CKE minimum high and low pulse width
tCKE
nCK
tRFC(min)
+10
tRFC(min)
+10
ns
Exit reset from CKE high to a valid
command
tXPR
5
-
-
5
-
-
nCK
nCK
DLL locking time
tDLLK
512
512
AMS73CAG01808RA Rev. 1.0 December 2010
25
AMS [ Advanced Monolithic Systems Ltd ]
