AMS73CAG01808RA
VDD or VDDQ
VSEH min
VSEH
VDD/2 or VDDQ/2
VSEL max
CK or DQS
VSEL
time
VSS or VSSQ
Single-ended requirement for differential signals
Note that while Address/command and DQ signal requirements are with respect to VREF, the single-ended
components of differential signals have a requirement with respect to VDD/2; this is nominally the same.
The transition of single-ended signals through the AC-levels is used to measure setup time. For single-
ended components of differential signals the requirement to reach VSEL max, VSEH min has no bearing on
timing, but adds a restriction on the common mode characteristics of these signals.
Single-ended levels for CK, DQS, CK, DQS
Symbol
Parameter
Min.
Max.
Units
Notes
1,2
Single-ended high-level for strobes
Single-ended high-level for CK, CK
Single-ended low-level for strobes
Single-ended low-level for CK, CK
(VDD/2) + 0.175
(VDD/2) + 0.175
NOTE 3
NOTE 3
V
V
V
V
VSEH
NOTE 3
1,2
(VDD/2) - 0.175
(VDD/2) - 0.175
1,2
VSEL
NOTE 3
1,2
NOTE :
1. For CK, CK use VIH/VIL(AC) of address/command; for strobes (DQS, DQS) use VIH/VIL(AC) of DQs.
2. VIH(AC)/VIL(AC) for DQs is based on VREFDQ; VIH(AC)/VIL(AC) for address/command is based on VREFCA; if a
reduced AC-high or AC-low level is used for a signal group, then the reduced level applies also here.
3. These values are not defined, however the single-ended components of differential signals CK, CK, DQS, DQS need
to be within the respective limits (VIH(DC) max, VIL(DC) min) for single-ended signals as well as the limitations for
overshoot and undershoot. Refer to "Overshoot and Undershoot specifications”.
AMS73CAG01808RA Rev. 1.0 December 2010
18
AMS [ Advanced Monolithic Systems Ltd ]
