A67P16181/A67P06361 Series
Block Diagram (1M X 36)
ZZ
MODE
LOGIC
MODE
ADV/LD
CLK
LOGIC
CEN
CLK
BURST
LOGIC
ADDRESS
COUNTER
CLR
WRITE
ADDRESS
REGISTER
ADDRESS
REGISTERS
A0-A19
9
BYTEa
WRITE
DRIVER
9
9
9
9
9
9
9
BYTEb
WRITE
DRIVER
1MX9X4
MEMORY
ARRAY
WRITE
REGISTRY
&
CONTROL
LOGIC
I/Os
ADV/LD
R/W
SENSE
AMPS
OUTPUT
BUFFERS
BYTEc
WRITE
DRIVER
BW1
BW2
BW3
BW4
BYTEd
WRITE
DRIVER
DATA-IN
REGISTERS
CE
CHIP
ENABLE
LOGIC
FLOW-THROUGH
ENABLE
CE2
CE2
LOGIC
OUTPUT
ENABLE
LOGIC
OE
PRELIMINARY
(August, 2004, Version 0.1)
4
AMIC Technology, Corp.