N64S0818HDA/N64S0830HDA
Advance Information
AMI Semiconductor, Inc.
Page and Burst READ Sequence
CS
SCK
0
1
2
3
4
5
6
7
8
9
10 11
21 22 23 24 25 26 27 28 29 30 31
Instruction
16-bit address
SI
0
0
0
0
0
0
1
1
15 14 13 12
2
1
0
Don’t Care
ADDR 1
Data Out from ADDR 1
High-Z
7
6
5
4
3
2
1
0
SO
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
Don’t Care
Data Out from ADDR 3
Data Out from ADDR 2
Data Out from ADDR n
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
...
Page READ Sequence
SI
16-bit address
Page address (X)
Word address (Y)
Data Words: sequential, at the end of the page the
address wraps back to the beginning of the page
SO
Page X
Word Y
Page X
Word Y+1 Word Y+2
Page X
Page X
Word 31 Word 0
Page X
Page X
Word 1
Burst READ Sequence
SI
Data Words: sequential, at the end of the page the address wraps to the beginning
of the page and continues incrementing up to the starting word address. At that
time, the address increments to the next page and the burst continues.
16-bit address
Page address (X)
Word address (Y)
. . .
. . .
SO
Page X
Word Y
Page X
Word Y+1
Page X
Word 31 Word 0
Page X
Page X
Word 1
Page X
Word Y-1 Word Y
Page X+1 Page X+1
Word Y+1
8
This is a developmental specification and is subject to change without notice.