N64S0818HDA/N64S0830HDA
Advance Information
AMI Semiconductor, Inc.
Timing Test Conditions
Item
0.1VCC to 0.9 VCC
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
5ns
0.5 VCC
CL = 100pF
-40 to +85 oC
Operating Temperature
Timing
1.8V Device
3V Device
Item
Symbol
Units
Min.
Max.
20
2
Min.
Max.
fCLK
tR
Clock Frequency
Clock Rise Time
Clock Fall Time
Clock High Time
Clock Low Time
Clock Delay Time
CS Setup Time
CS Hold Time
25
2
MHz
us
us
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tF
2
2
tHI
25
25
25
25
50
25
5
20
20
20
20
40
20
5
tLO
tCLD
tCSS
tCSH
tCSD
tSCS
tSU
tHD
tV
CS Disable Time
SCK to CS
Data Setup Time
Data Hold Time
10
10
10
10
Output Valid From Clock Low
Output Hold Time
25
20
20
15
tHO
tDIS
tHS
tHH
tHZ
tHV
0
0
Output Disable Time
HOLD Setup Time
10
10
10
10
10
10
HOLD Hold Time
HOLD Low to Output High-Z
HOLD High to Output Valid
50
40
4
This is a developmental specification and is subject to change without notice.