欢迎访问ic37.com |
会员登录 免费注册
发布采购

M42000002V 参数 Datasheet PDF下载

M42000002V图片预览
型号: M42000002V
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(8M ×8位/ 4米x 16位) CMOS 3.0伏只,同时操作闪存和4兆位( 256千×16位),静态RAM [64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM]
分类和应用: 闪存
文件页数/大小: 61 页 / 1027 K
品牌: AMD [ ADVANCED MICRO DEVICES ]
 浏览型号M42000002V的Datasheet PDF文件第53页浏览型号M42000002V的Datasheet PDF文件第54页浏览型号M42000002V的Datasheet PDF文件第55页浏览型号M42000002V的Datasheet PDF文件第56页浏览型号M42000002V的Datasheet PDF文件第57页浏览型号M42000002V的Datasheet PDF文件第59页浏览型号M42000002V的Datasheet PDF文件第60页浏览型号M42000002V的Datasheet PDF文件第61页  
P R E L I M I N A R Y
FLASH ERASE AND PROGRAMMING PERFORMANCE
Parameter
Sector Erase Time
Chip Erase Time
Byte Program Time
Accelerated Byte/Word Program Time
Word Program Time
Chip Program Time
(Note 3)
Byte Mode
Word Mode
Typ (Note 1)
0.4
56
5
4
7
42
28
150
120
210
126
sec
84
Max (Note 2)
5
Unit
sec
sec
µs
µs
µs
Excludes system level
overhead (Note 5)
Comments
Excludes 00h programming
prior to erasure (Note 4)
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V V
CC
, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, V
CC
= 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table
12 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
LATCHUP CHARACTERISTICS
Description
Input voltage with respect to V
SS
on all pins except I/O pins
(including A9, OE#, and RESET#)
Input voltage with respect to V
SS
on all I/O pins
V
CC
Current
Min
–1.0 V
–1.0 V
–100 mA
Max
12.5 V
V
CC
+ 1.0 V
+100 mA
Note:
Includes all pins except V
CC
. Test conditions: V
CC
= 3.0 V, one pin at a time.
PACKAGE PIN CAPACITANCE
Parameter
Symbol
C
IN
C
OUT
C
IN2
C
IN3
Parameter Description
Input Capacitance
Output Capacitance
Control Pin Capacitance
WP#/ACC Pin Capacitance
Test Setup
V
IN
= 0
V
OUT
= 0
V
IN
= 0
V
IN
= 0
Typ
11
12
14
17
Max
14
16
16
20
Unit
pF
pF
pF
pF
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
A
= 25°C, f = 1.0 MHz.
FLASH DATA RETENTION
Parameter Description
Minimum Pattern Data Retention Time
125°C
20
Years
Test Conditions
150°C
Min
10
Unit
Years
March 20, 2002
Am42DL6404G
57