Multiplexed Pin Function Options
Table 20 shows how to configure each multiplexed
signal on the ÉlanSC400 and ÉlanSC410
microcontrollers.
Pins with multiplexed functions have their functions
selected in one of three ways:
■ By configuration pins that are latched during reset
■ By assertion at BNDSCN_EN
Note that those signals marked with a superscript 1 (1)
are not supported on the ÉlanSC410 microcontroller.
■ By firmware via programmed configuration registers
Table 20. Multiplexed Pin Configuration Options
Signal You Want Signals You Give Up How to Configure the Signal You Want on the Pin
System Interface
Pin #
BALE
KBD_ROW10
GPIO_CS4
GPIO_CS3
GPIO_CS2
KBD_ROW12
KBD_ROW7
KBD_ROW8
GPIO_CS8
GPIO_CS7
KBD_ROW9
KBD_COL2
KBD_COL3
KBD_COL4
KBD_COL5
KBD_COL6
KBD_ROW13
Set CSC index 39h[2].
D2
C4
DBUFOE
DBUFRDH
DBUFRDL
MCS16
PDACK1
PDRQ1
PIRQ0
Hardwire strap the CFG3 pin High.
Hardwire strap the CFG3 pin High.
Hardwire strap the CFG3 pin High.
Set CSC index 39h[2].
D17
C18
F3
Set CSC index 39h[2].
D3
Set CSC index 39h[2].
C2
Set CSC index 38h[1].
W18
Y19
E3
PIRQ1
Set CSC index 38h[2].
PIRQ2
Set CSC index 39h[2].
PIRQ3
Set CSC index 3Ah[1].
A2
PIRQ4
Set CSC index 3Ah[1].
B3
PIRQ5
Set CSC index 3Ah[2].
C3
PIRQ6
Set CSC index 3Ah[2].
A1
PIRQ7
Set CSC index 3Ah[2].
B2
R32BFOE
Hardwire-strap both the CFG1 and CFG0 pins High to enable the
32-bit ROM interface on ROMSC0. This automatically enables
R32BFOE.
A3
SBHE
KBD_ROW11
Set CSC index 39h[2].
C1
Configuration Pins (Pinstraps) (See “Using the Configuration Pins to Select Pin Functions” on page 74.)
Memory Interface
CASH2
CASH3
CASL2
CASL3
MA12
KBD_ROW2
KBD_ROW3
KBD_ROW0
KBD_ROW1
KBD_ROW6
KBD_ROW4
KBD_ROW5
Set bit 3 of the DRAM Bank x Configuration Register.
Set CSC index 00h[7] and 00h[3], or
Set CSC index 01h[7] and 01h[3], or
Set CSC index 02h[7], or
C17
B18
B19
D16
B17
D15
C16
Set CSC index 03h[7].
RAS2
RAS3
70
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
AMD [ AMD ]
