Table 19. Signal Description Table (Continued)
Description
Signal
Type
ICDIR
O
Card Data Direction controls the direction of the card data buffers or voltage translators. It
works with the MCEL and MCEH card enable signals to control data buffers on the card
interface. When this signal is High, the data flow is from the chip to the card socket, indicating
a data write cycle. When this signal is Low, the data flow is from the card socket into the chip,
indicating a read cycle. This signal is not supported on the ÉlanSC410 microcontroller.
MCEH_A, MCEH_B
MCEL_A, MCEL_B
OE
O
O
O
O
O
O
O
I
Card Enables, High Byte enables a PC Card’s high data bus byte transceivers for the
respective card interfaces. These signals are not supported on the ÉlanSC410 microcontroller.
Card Enables, Low Byte enables a PC Card’s low data bus byte transceivers for the
respective card interfaces. These signals are not supported on the ÉlanSC410 microcontroller.
PC Card Output Enable: This is the PC Card memory read signal. This signal is not
supported on the ÉlanSC410 microcontroller.
PCMA_VCC
PC Card Socket A VCC Enable can be used to control the VCC to Socket A. This signal is
not supported on the ÉlanSC410 microcontroller.
PCMA_VPP2–
PCMA_VPP1
PC Card Socket A VPP Selects can be used to control the VPP to Socket A. These signals
are not supported on the ÉlanSC410 microcontroller.
PCMB_VCC
PC Card Socket B VCC Enable can be used to control the VCC to Socket B. This signal is
not supported on the ÉlanSC410 microcontroller.
PCMB_VPP2–
PCMB_VPP1
PC Card Socket B VPP Selects can be used to control the VPP to Socket B. These signals
are not supported on the ÉlanSC410 microcontroller.
RDY_A (IREQ_A),
RDY_B (IREQ_B)
Card Ready indicates that the respective card is ready to accept a new data transfer
command. When the card interface is configured as an I/O interface, this signal is used as
the card Interrupt Request input into the chip. These signals are not supported on the
ÉlanSC410 microcontroller.
REG_A (DACK_A),
REG_B (DACK_B)
O
Attribute Memory Select signals are driven inactive (High) for accesses to a PC Card’s
common memory, and asserted (Low) for accesses to a PC Card’s attribute memory and
I/O space for their respective card interfaces. When PC Card DMA is enabled, the DMA
acknowledge to the PC Card appears on this signal. These signals are not supported on the
ÉlanSC410 microcontroller.
RST_A, RST_B
WAIT_AB
O
I
Card Reset signals are the reset for their respective cards. When active, this signal clears
the Interrupt and General Control Register (PC Card index 03h and 43h), thus placing a card
in an unconfigured (Memory-Only mode) state. It also indicates the beginning of any additional
card initialization. These signals are not supported on the ÉlanSC410 microcontroller.
Extend Bus Cycle delays the completion of the memory access or I/O access that is
currently in progress. When this signal is asserted (Low), wait states are inserted into the
cycle in progress. Only one WAIT input is provided on the chip. External logic is required for
a two-socket implementation to logically AND (digitally OR) each card’s WAIT signal
together. This signal is not supported on the ÉlanSC410 microcontroller.
WE (TC)
O
I
PC Card Write Enable is the PC Card memory write signal. Data is transferred from the chip
to the PC Card. When PC Card DMA is enabled, the DMA Terminal Count to the PC Card
appears on this signal. This signal is not supported on the ÉlanSC410 microcontroller.
WP_A (IOIS16_A)
(DRQ_A), WP_B
(IOIS16_B)
Write Protect indicates the status of the respective card’s Write Protect switch. When the
respective card is configured for an I/O interface, this signal is used by the card to indicate
back to the chip that the currently accessed port is 16 bits wide. When PC Card DMA is
enabled, the DMA request from the PC Card can be programmed to appear on this signal.
See also the description for BVD2_A (SPKR_A) (DRQ_A) and BVD2_B (SPKR_B)
(DRQ_B); the DMA request can also be programmed to appear on these pins. These signals
are not supported on the ÉlanSC410 microcontroller.
(DRQ_B)
LCD Graphics Controller (ÉlanSC400 Microcontroller Only)
FRM
O
LCD Panel Line Frame Start is asserted by the chip at the start of every frame to indicate
to the LCD panel that the next data clocked out is intended for the start of the first scan line
on the panel. Some panels refer to this signal as FLM or S (scan start-up). This signal is not
supported on the ÉlanSC410 microcontroller.
68
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
AMD [ AMD ]
