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AM79C978KC/W 参数 Datasheet PDF下载

AM79C978KC/W图片预览
型号: AM79C978KC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片1/10 Mbps的PCI家庭网络控制器 [Single-Chip 1/10 Mbps PCI Home Networking Controller]
分类和应用: 控制器PC
文件页数/大小: 261 页 / 3499 K
品牌: AMD [ AMD ]
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Table 38. EEDET Setting  
EEDET Value  
(BCR19[13])  
EEPROM  
Connected?  
Result of Automatic EEPROM Read  
Operation Following H_RESET  
Result if PREAD is Set to 1  
EEPROM read operation is attempted.  
First two EESK clock cycles are generated,  
0
0
1
1
No  
Yes  
No  
Entire read sequence will occur, checksum then EEPROM read operation is aborted  
failure will result, PVALID is reset to 0.  
and PVALID is reset to 0.  
EEPROM read operation is attempted.  
First two EESK clock cycles are generated,  
Entire read sequence will occur, checksum then EEPROM read operation is aborted  
operation will pass, PVALID is set to 1.  
and PVALID is reset to 0.  
EEPROM read operation is attempted.  
EEPROM read operation is attempted.  
Entire read sequence will occur, checksum Entire read sequence will occur, checksum  
failure will result, PVALID is reset to 0.  
failure will result, PVALID is reset to 0.  
EEPROM read operation is attempted.  
EEPROM read operation is attempted.  
Yes  
Entire read sequence will occur, checksum Entire read sequence will occur, checksum  
operation will pass, PVALID is set to 1. operation will pass, PVALID is set to 1.  
Table 39. Interface Pin Assignment  
PREAD or Auto  
RST Pin  
Low  
Read in Progress  
EEN  
X
EECS  
0
EESK  
Tri-State  
Active  
EEDI  
Tri-State  
Active  
X
1
High  
X
Active  
From ECS  
Bit of BCR19  
0
From ESK Bit of  
BCR19  
From EEDI Bit of  
BCR19  
High  
High  
0
0
1
0
LED1  
LED0  
1
ESK  
EEPROM Serial Clock. This bit  
and the EDI/EDO bit are used to  
control host access to the EE-  
PROM. Values programmed to  
this bit are placed onto the EESK  
pin at the rising edge of the next  
clock following bit programming,  
except when the PREAD bit is set  
to 1 or the EEN bit is set to 0. If  
both the ESK bit and the EDI/  
EDO bit values are changed dur-  
ing one BCR19 write operation,  
while EEN = 1, then setup and  
hold times of the EEDI pin value  
with respect to the EESK signal  
edge are not guaranteed.  
this bit will appear on the EEDI  
output of the interface, except  
when the PREAD bit is set to 1 or  
the EEN bit is set to 0. Data that  
is read from this bit reflects the  
value of the EEDO input of the in-  
terface.  
EDI/EDO has no effect on the  
EEDI pin unless the PREAD bit is  
set to 0 and the EEN bit is set to  
1.  
Read accessible always; write  
accessible only when either the  
STOP or the SPND bit is set. EDI/  
EDO is reset to 0 by H_RESET  
and is not affected by S_RESET  
or STOP.  
ESK has no effect on the EESK  
pin unless the PREAD bit is set to  
0 and the EEN bit is set to 1.  
BCR20: Software Style  
This bit is read accessible al-  
ways, write accessible only when  
either the STOP or the SPND bit  
is set. ESK is reset to 1 by  
H_RESET and is not affected by  
S_RESET or STOP.  
Thisregisterisanaliasof the location CSR58. Accesses  
to and from this register are equivalent to accesses to  
CSR58.  
Bit  
Name  
Description  
31-11 RES  
Reserved locations. Written as  
zeros and read as undefined.  
0
EDI/EDO  
EEPROM Data In/EEPROM  
Data Out. Data that is written to  
Am79C978  
161