A value of 0 in this bit indicates a
failure in reading the EEPROM.
The checksum for the entire 82
bytes of EEPROM is incorrect or
no EEPROM is connected to the
interface pins.
will assert the PVALID bit. EE-
PROM contents will be indirectly
accessible to the host through
read accesses to the Address
PROM (offsets 0h through Fh)
and through read accesses to
other EEPROM programmable
registers. Note that read access-
es from these locations will not
actually access the EEPROM it-
self, but instead will access the
Am79C978 internal copy of the
EEPROM contents. Write ac-
cesses to these locations may
change the Am79C978 register
contents, but the EEPROM loca-
tions will not be affected. EE-
PVALID is set to
0 during
H_RESET and is unaffected by
S_RESET or the STOP bit. How-
ever, following the H_RESET op-
eration, an automatic read of the
EEPROM will be performed. Just
as it is true for the normal PREAD
command, at the end of this auto-
matic read operation the PVALID
bit may be set to 1. Therefore,
H_RESET will set the PVALID bit
to 0 at first, but the automatic EE-
PROM read operation may later
set PVALID to a 1.
PROM
locations
directly
may
be
accessed
BCR19.
through
At the end of the read operation,
the PREAD bit will automatically
be reset to a 0 by the Am79C978
controller and PVALID will be set,
provided that an EEPROM exist-
ed on the interface pins and that
the checksum for the entire 68
bytes of EEPROM was correct.
If PVALID becomes 0 following
an EEPROM read operation (ei-
ther automatically generated af-
ter H_RESET, or requested
through PREAD), then all EE-
PROM-programmable BCR loca-
tions will be reset to their
H_RESET values. The content of
the Address PROM locations,
however, will not be cleared.
Note that when PREAD is set to a
1, then the Am79C978 controller
will no longer respond to any ac-
cesses directed toward it, until
the PREAD operation has com-
If no EEPROM is present at the
EESK, EEDI, and EEDO pins,
then all attempted PREAD com-
mands will terminate early and
PVALID will not be set. This ap-
plies to the automatic read of the
EEPROM after H_RESET, as
well as to host-initiated PREAD
commands.
pleted
successfully.
The
Am79C978 controller will termi-
nate these accesses with the as-
sertion of DEVSEL and STOP
while TRDY is not asserted, sig-
naling to the initiator to discon-
nect and retry the access at a
later time.
14
PREAD
EEPROM Read command bit.
When this bit is set to a 1 by the
host, the PVALID bit (BCR19, bit
15) will immediately be reset to a
0, and then the Am79C978 con-
troller will perform a read opera-
tion of 82 bytes from the
EEPROM through the interface.
The EEPROM data that is
fetched during the read will be
stored in the appropriate internal
If a PREAD command is given to
the Am79C978 controller but no
EEPROM is attached to the inter-
face pins, the PREAD bit will be
cleared to a 0, and the PVALID bit
will remain reset with a value of 0.
This applies to the automatic
read of the EEPROM after
H_RESET as well as to host initi-
ated PREAD commands. EE-
PROM programmable locations
on board the Am79C978 control-
ler will be set to their default val-
ues by such an aborted PREAD
registers
on
board
the
Am79C978 controller. Upon com-
pletion of the EEPROM read op-
eration, the Am79C978 controller
Am79C978
159
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