and is not affected by S_RESET
or STOP.
defined width for I/O resources.
I/O resource width is determined
by the state of the DWIO bit
(BCR18, bit 7).
If SSIZE32 is reset, then bits
IADR[31:24] of CSR2 will be
used to generate values for the
upper 8 bits of the 32-bit address
bus during master accesses initi-
ated by the Am79C978 controller.
This action is required because
the 16-bit software structures
specified by the SSIZE32 = 0 set-
ting will yield only 24 bits of ad-
7-0
SWSTYLE Software Style register. The val-
ue in this register determines the
style of register and memory re-
sources that shall be used by the
Am79C978 controller. The Soft-
ware Style selection will affect the
interpretation of a few bits within
the CSR space, the order of the
descriptor entries and the width of
the descriptors and initialization
block entries.
dress
for
the
Am79C978
controller bus master accesses.
If SSIZE32 is set, then the soft-
ware structures that are common
to the Am79C978 controller and
the host system will supply a full
32 bits for each address pointer
that is needed by the Am79C978
controller for performing master
accesses.
All Am79C978 controller CSR
bits and BCR bits and all descrip-
tor, buffer, and initialization block
entries not cited in Table 31 are
unaffected by the Software Style
selection and are, therefore, al-
ways fully functional as specified
in the CSR and BCR sections.
The value of the SSIZE32 bit has
no effect on the drive of the upper
8 address bits. The upper 8 ad-
dress pins are always driven, re-
gardless of the state of the
SSIZE32 bit.
These bits are read/write acces-
sible only when either the STOP
or the SPND bit is set. The SW-
STYLE register will contain the
value 00h following H_RESET
and will be unaffected by
S_RESET or STOP.
Note that the setting of the
SSIZE32 bit has no effect on the
Table 31. Software Styles
Initialization Block
SWSTYLE
[7:0]
Style
Name
SSIZE32
Entries
Descriptor Ring Entries
16-bit software structures, 16-bit software structures,
non-burst or burst access non-burst access only
LANCE/PCnet-ISA
controller
00h
01h
02h
0
1
1
RES
RES
RES
32-bit software structures, 32-bit software structures,
non-burst or burst access non-burst access only
PCnet-PCI
controller
PCnet-PCI
controller
32-bit software structures, 32-bit software structures,
non-burst or burst access non-burst or burst access
03h
1
All Other
RES
Undefined
Undefined
Undefined
Am79C978
135
AMD [ AMD ]
