Auto-Negotiation goes further by providing a message-
based communication scheme called Next Pages be-
fore connecting to the Link Partner. This feature is not
supported in the Am79C978 device unless the DANAS
(BCR32, bit 10) is selected.
that the register can be polled to verify that the soft
reset has terminated. Under normal operating condi-
tions, soft reset will be finished in 150 clock cycles.
Soft reset only resets the 10BASE-T PHY unit registers
to default values (some register bits retain their previ-
ous values). Refer to the individual registers for values
after a soft reset. Soft reset does not reset the manage-
ment interface.
Soft Reset Function
The PHY Control Register (TBR0) incorporates the soft
reset function (bit 15). It is a read/write register and is
self-clearing. Writing a 1 to this bit causes a soft reset.
When read, the register returns a 1 if the soft reset is
still being performed; otherwise, it is cleared to 0. Note
100
Am79C978
AMD [ AMD ]
