AMD
P R E L I M I N A R Y
TIR mapping with SIR1 bit 2 (EIOW) set to “0” = normal
TIR window mode. Note that EIOW = 0 is the only setting
of EIOW that is allowed while operating in ISA PnP
mode. TIR uses eight I/O addresses:
TIR
Register
Number
SIR1[1:0]
(TAI Bank
Select)
ISA Plug
and Play
I/O Address
80188 Core
Address in
Memory
PCMCIA
I/O Address
TIR Register Name
Network Control
0
00
00
00
00
00
00
00
00
01
01
01
01
01
01
01
01
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
0008h
0009h
000Ah
000Bh
000Ch
000Dh
000Eh
000Fh
0008h
0009h
000Ah
000Bh
000Ch
000Dh
000Eh
000Fh
0008h
0009h
000Ah
000Bh
000Ch
000Dh
000Eh
000Fh
0008h
0009h
000Ah
000Bh
000Ch
000Dh
000Eh
000Fh
IOBA+0008h
IOBA+0009h
IOBA+000Ah
IOBA+000Bh
IOBA+000Ch
IOBA+000Dh
IOBA+000Eh
IOBA+000Fh
IOBA+0008h
IOBA+0009h
IOBA+000Ah
IOBA+000Bh
IOBA+000Ch
IOBA+000Dh
IOBA+000Eh
IOBA+000Fh
IOBA+0008h
IOBA+0009h
IOBA+000Ah
IOBA+000Bh
IOBA+000Ch
IOBA+000Dh
IOBA+000Eh
IOBA+000Fh
IOBA+0008h
IOBA+0009h
IOBA+000Ah
IOBA+000Bh
IOBA+000Ch
IOBA+000Dh
IOBA+000Eh
IOBA+000Fh
mem 400h
mem 401h
mem 402h
mem 403h
mem 404h
mem 405h
mem 406h
mem 407h
mem 408h
mem 409h
mem 40Ah
mem 40Bh
mem 40Ch
mem 40Dh
mem 40Eh
mem 40Fh
mem 410h
mem 411h
mem 412h
mem 413h
mem 414h
mem 415h
mem 416h
mem 417h
mem 418h
mem 419h
mem 41Ah
mem 41Bh
mem 41Ch
mem 41Dh
mem 41Eh
mem 41Fh
1
Network Status
2
Serial Device
3
Fast Serial Port Control
Interrupt Register 1
Interrupt Register 2
Interrupt Mask 1
4
5
6
7
Interrupt Mask 2
8
Transmit Control
9
Transmit Status
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
TX FIFO Data
Transmit Sequence Control
Byte Counter LSB
Byte Counter MSB
Byte Counter Limit LSB
Byte Counter Limit MSB
Receiver Control
Receiver Status
RX FIFO Data
Antenna Slot
CRC32 Correct Count LSB
CRC32 Correct Count MSB
CRC8 Correct Count LSB
CRC8 Correct Count MSB
Configuration Index
Configuration Data Port
Antenna Diversity & A/D
SAR
RSSI Lower Limit
USER Pin Data
Dummy Register
TEST Register
Am79C930
87
AMD [ AMD ]
