P R E L I M I N A R Y
prior to this, the device outputs the “comple-
ment,” or “0.” The system must provide an
address within any of the sectors selected for
erasure to read valid status information on DQ7.
START
After an erase command sequence is written, if
all sectors selected for erasing are protected,
Data# Polling on DQ7 is active for approxi-
mately 100 µs, then the device returns to
reading array data. If not all selected sectors are
protected, the Embedded Erase algorithm
erases the unprotected sectors, and ignores the
selected sectors that are protected.
Read DQ7–DQ0
Addr = VA
Yes
DQ7 = Data?
When the system detects DQ7 has changed
from the complement to true data, it can read
valid data at DQ7–DQ0 on the following read
cycles. This is because DQ7 may change asyn-
chronously with DQ0–DQ6 while Output Enable
(OE#) is asserted low. Figure 1, Data# Polling
Timings (During Embedded Algorithms), in the
“AC Characteristics” section illustrates this.
No
No
DQ5 = 1?
Table 6 shows the outputs for Data# Polling on
DQ7. Figure 1 shows the Data# Polling algo-
rithm.
Yes
Read DQ7–DQ0
Addr = VA
Yes
DQ7 = Data?
No
PASS
FAIL
Notes:
1. VA = Valid address for programming. During a
sector erase operation, a valid address is an
address within any sector selected for erasure.
During chip erase, a valid address is any
non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = “1” be-
cause DQ7 may change simultaneously with DQ5.
Figure 1. Data# Polling Algorithm
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output
pin that indicates whether an Embedded Algo-
rithm is in progress or complete. The RY/BY#
status is valid after the rising edge of the final
WE# pulse in the command sequence. Since
RY/BY# is an open-drain output, several
January 21, 2005 Am29LV800D_00_A4_E
Am29LV800D
23
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