P R E L I M I N A R Y
Table 2. Am29DL800BT Top Boot Sector Architecture
Sector Address
Sector Size
Bank Address
(Kbytes/
Kwords)
(x8)
(x16)
Address Range
Bank
Sector A18 A17 A16 A15 A14 A13 A12
Address Range
SA0
SA1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
64/32
16/8
00000h–0FFFFh
10000h–1FFFFh
20000h–2FFFFh
30000h–3FFFFh
40000h–4FFFFh
50000h–5FFFFh
60000h–6FFFFh
70000h–7FFFFh
80000h–8FFFFh
90000h–9FFFFh
A0000h–AFFFFh
B0000h–BFFFFh
C0000h–CFFFFh
D0000h–DFFFFh
E0000h–E3FFFh
00000h–07FFFh
08000h–0FFFFh
10000h–17FFFh
18000h–1FFFFh
20000h–27FFFh
28000h–2FFFFh
30000h–37FFFh
38000h–3FFFFh
40000h–47FFFh
48000h–4FFFFh
50000h–57FFFh
58000h–5FFFFh
60000h–67FFFh
68000h–6FFFFh
70000h–71FFFh
SA2
SA3
SA4
SA5
SA6
Bank 2
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
0
1
E4000h–E7FFFh,
E8000h–EBFFFh
72000h–73FFFh
74000h–75FFFh
SA15
1
1
1
0
32/16
1
0
SA16
SA17
SA18
SA19
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
8/4
8/4
8/4
8/4
EC000h–EDFFFh
EE000h–EFFFFh
F0000h–F1FFFh
F2000h–F3FFFh
76000h–76FFFh
77000h–77FFFh
78000h–78FFFh
79000h–79FFFh
1
1
1
Bank 1
0
0
0
0
0
1
0
1
X
X
X
F4000h–F7FFFh,
F8000h–FBFFFh
7A000h–7BFFFh
7C000h–7DFFFh
SA20
SA21
1
1
1
1
1
1
1
1
32/16
16/8
1
0
1
1
FC000h–FFFFFh
7E000h–7FFFFh
Note: The address range is A18:A-1 if in byte mode (BYTE# = V ). The address range is A18:A0 if in word mode (BYTE# = V ).
IL
IH
Am29DL800B
11
AMD [ AMD ]
