Switching Characteristics over Commercial and Industrial Operating Ranges
Clock (25 MHz)
Preliminary
Parameter
Symbol Description
25 MHz
Min
No.
Max
Unit
CLKIN Requirements for Times One Mode
tCKIN
36
37
38
39
40
X1 Period(a)
40
15
15
60
ns
ns
ns
ns
ns
X1 Low Time (1.5 V)(a)
X1 High Time (1.5 V)(a)
X1 Fall Time (3.5 to 1.0 V)(a)
X1 Rise Time (1.0 to 3.5 V)(a)
tCLCK
tCHCK
tCKHL
tCKLH
5
5
CLKIN Requirements for Divide by Two Mode
tCKIN
tCLCK
tCHCK
tCKHL
tCKLH
36
37
38
39
40
X1 Period(a)
20
10
10
33
ns
ns
ns
ns
ns
X1 Low Time (1.5 V)(a)
X1 High Time (1.5 V)(a)
X1 Fall Time (3.5 to 1.0 V)(a)
X1 Rise Time (1.0 to 3.5 V)(a)
5
5
CLKOUT Timing
tCLCL
tCLCH
42
43
CLKOUTA Period
40
ns
ns
ns
ns
ns
ms
ns
ns
0.5tCLCL–2=18
0.5tCLCL–2=18
CLKOUTA Low Time (CL=50 pF)
CLKOUTA High Time (CL=50 pF)
CLKOUTA Rise Time (1.0 to 3.5 V)
CLKOUTA Fall Time (3.5 to 1.0 V)
Maximum PLL Lock Time
X1 to CLKOUTA Skew
tCHCL
44
tCH1CH2
tCL2CL1
tLOCK
45
3
3
46
61
1
tCICOA
tCICOB
69
20
34
70
X1 to CLKOUTB Skew
Notes:
All timing parameters are measured at VCC/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with CL=50 pF. For switching tests, VIL=0.3 V and VIH =VCC–0.3 V.
a
The specifications for CLKIN are applicable to the Divide by Two and Times One modes.
The Times One mode should be used for operations from 16 MHz to 20 MHz. The Times Four mode should
be used for operations above 20 MHz.
92
Am186TMER and Am188TMER Microcontrollers Data Sheet
AMD [ AMD ]
