Switching Characteristics over Commercial and Industrial Operating Ranges
Ready and Peripheral Timing (25 MHz and 33 MHz)
Preliminary
Parameter
25 MHz
Min
33 MHz
Min
No.
Symbol Description
Max
Max
Unit
Ready and Peripheral Timing Requirements
tSRYCL
47
48
49
50
51
52
53
54
SRDY Transition Setup Time(a)
SRDY Transition Hold Time(a)
ARDY Resolution Transition Setup Time(b)
ARDY Active Hold Time(a)
ARDY Inactive Holding Time
ARDY Setup Time(a)
10
3
8
3
ns
ns
ns
ns
ns
ns
ns
ns
tCLSRY
tARYCH
tCLARX
tARYCHL
tARYLCL
tINVCH
10
4
8
4
4
4
15
10
10
10
8
Peripheral Setup Time(b)
DRQ Setup Time(b)
tINVCL
8
Peripheral Timing Responses
tCLTMV
55
Timer Output Delay
20
15
ns
Notes:
All timing parameters are measured at VCC/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with CL=50 pF. For switching tests, VIL=0.3 V and VIH =VCC–0.3 V.
a
b
This timing must be met to guarantee proper operation.
This timing must be met to guarantee recognition at the clock edge.
Switching Characteristics over Commercial and Industrial Operating Ranges
Ready and Peripheral Timing (40 MHz and 50 MHz)
Preliminary
Parameter
Symbol Description
Ready and Peripheral Timing Requirements
40 MHz
Min
50 MHz
Min
No.
Max
Max Unit
tSRYCL
tCLSRY
tARYCH
tCLARX
tARYCHL
tARYLCL
tINVCH
tINVCL
47
48
49
50
51
52
53
54
SRDY Transition Setup Time(a)
SRDY Transition Hold Time(a)
ARDY Resolution Transition Setup Time(b)
ARDY Active Hold Time(a)
ARDY Inactive Holding Time
ARDY Setup Time(a)
5
2
5
3
5
5
5
5
5
2
5
3
5
5
5
5
ns
ns
ns
ns
ns
ns
ns
ns
Peripheral Setup Time(b)
DRQ Setup Time(b)
Peripheral Timing Responses
tCLTMV
55
Timer Output Delay
12
10
ns
Notes:
All timing parameters are measured at VCC/2 with 50 pF loading on CLKOUTA unless otherwise noted. All
output test conditions are with CL=50 pF. For switching tests, VIL=0.3 V and VIH =VCC–0.3 V.
a
b
This timing must be met to guarantee proper operation.
This timing must be met to guarantee recognition at the clock edge.
96
Am186TMER and Am188TMER Microcontrollers Data Sheet
AMD [ AMD ]
