Switching Characteristics over Commercial and Industrial Operating Ranges
Software Halt Cycle (25 MHz and 33 MHz)
Preliminary
Parameter
25 MHz
Min
33 MHz
Min
No.
Symbol Description
Max
Max
Unit
General Timing Responses
tCHSV
tCLSH
tCLAV
tCHLH
tLHLL
3
4
Status Active Delay
0
0
0
20
20
20
20
0
0
0
15
15
15
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
Status Inactive Delay
AD Address Invalid Delay
ALE Active Delay
5
9
tCLCL–10=30
tCLCL–10=20
10
ALE Width
tCHLL
tDXDL
tCHCTV
tCHAV
11
ALE Inactive Delay
20
15
19
DEN Inactive to DT/R Low(a)
Control Active Delay 2(b)
CLKOUTA High to A Address Invalid
0
0
0
0
0
0
22
20
20
15
15
68
Notes:
All timing parameters are measured at VCC/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with CL=50 pF. For switching tests, VIL=0.3 V and VIH =VCC–0.3 V.
a
b
Testing is performed with equal loading on referenced pins.
This parameter applies to the DEN signal.
Switching Characteristics over Commercial and Industrial Operating Ranges
Software Halt Cycle (40 MHz and 50 MHz)
Preliminary
Parameter
40 MHz
Min
50 MHz
Min
No.
Symbol Description
Max
Max
Unit
General Timing Responses
tCHSV
tCLSH
tCLAV
tCHLH
tLHLL
3
4
Status Active Delay
0
0
0
12
12
12
12
0
0
0
10
10
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
Status Inactive Delay
AD Address Invalid Delay
ALE Active Delay
5
9
tCLCL–5=20
10
ALE Width
15
tCHLL
tDXDL
tCHCTV
tCHAV
11
ALE Inactive Delay
12
10
19
DEN Inactive to DT/R Low(a)
Control Active Delay 2(b)
CLKOUTA High to A Address Invalid
0
0
0
0
0
0
22
12
10
10
10
68
Notes:
All timing parameters are measured at VCC/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with CL=50 pF. For switching tests, VIL=0.3 V and VIH =VCC–0.3 V.
a
b
Testing is performed with equal loading on referenced pins.
This parameter applies to the DEN signal.
90
Am186TMER and Am188TMER Microcontrollers Data Sheet
AMD [ AMD ]
