P R E L I M I N A R Y
CLOCK AND POWER MANAGEMENT
The clock and power management unit of the
Am186EM and Am188EM microcontrollers includes a
phase-locked loop (PLL) and a second programmable
system clock output (CLKOUTB).
fect the operation of the clock generator. Values for the
loading on X1 and X2 must be chosen to provide the
necessary phase shift and crystal operation.
Selecting a Crystal
Phase-Locked Loop (PLL)
When selecting a crystal, the load capacitance should
always be specified (CL). This value can cause variance
in the oscillation frequency from the desired specified
value (resonance). The load capacitance and the loading
of the feedback network have the following relationship:
In a traditional 80C186/188 design, the crystal frequency is
twice that of the desired internal clock. Because of the
internal PLL on the Am186EM and Am188EM
microcontrollers, the internal clock generated by the
Am186EM and Am188EM microcontrollers (CLKOUTA) is
the same frequency as the crystal. The PLL takes the
crystal inputs (X1 and X2) and generates a 45/55% (worst
case) duty cycle intermediate system clock of the same
frequency. This removes the need for an external 2x
oscillator, reducing system cost. The PLL is reset by an
on-chip power-on reset (POR) circuit.
(C1 C2)
+ CS
CL =
(C1 + C2)
where CS is the stray capacitance of the circuit. Placing
the crystal and CL in series across the inverting amplifier
and tuning these values (C1, C2) allows the crystal to os-
cillate at resonance. This relationship is true for both fun-
damental and third-overtone operation. Finally, there is a
relationship between C1 and C2. To enhance the oscilla-
tion of the inverting amplifier, these values need to be off-
set with the larger load on the output (X2). Equal values of
these loads will tend to balance the poles of the inverting
amplifier.
Crystal-Driven Clock Source
The internal oscillator circuit of the Am186EM and
Am188EM microcontrollers is designed to function with
a parallel-resonant fundamental or third-overtone crys-
tal. Because of the PLL, the crystal frequency should
be equal to the processor frequency. Do not replace a
crystal with an LC or RC equivalent.
The characteristics of the inverting amplifier set limits
on the following parameters for crystals:
The signals X1 and X2 are connected to an internal in-
verting amplifier (oscillator) which provides, along with
the external feedback loading, the necessary phase
shift (Figure 8). In such a positive feedback circuit, the
inverting amplifier has an output signal (X2) 180 de-
grees out of phase of the input signal (X1).
ESR (Equivalent Series Resistance)........... 80 ohm max
Drive Level.....................................................................................1 mW max
The recommended range of values for C1 and C2 are as
follows:
The external feedback network provides an additional
180-degree phase shift. In an ideal system, the input to
X1 will have 360 or zero degrees of phase shift. The ex-
ternal feedback network is designed to be as close to
ideal as possible. If the feedback network is not provid-
ing necessary phase shift, negative feedback will
dampen the output of the amplifier and negatively af-
C1..............................................................................................................15 pF ± 20%
C2..............................................................................................................22 pF ± 20%
The specific values for C1 and C2 must be determined by
the designer and are dependent on the characteristics of
the chosen crystal and board design.
C1
X1
Crystal
X2
Crystal
C2
Am186EM
C1
C2
Microcontroller
Note 1
Note 1: Use for Third Overtone Mode
XTAL Frequency L1 Value (Max)
a. Inverting Amplifier Configuration
200 pF
b. Crystal Configuration
20 MHz
25 MHz
33 MHz
40 MHz
12 µH ±20%
8.2 µH ±20%
4.7 µH ±20%
3.0 µH ±20%
Figure 8. Am186EM and Am188EM Microcontrollers Oscillator Configurations
Am186/188EM and Am186/188EMLV Microcontrollers
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