DEVICE SPECIFICATION
S5933
PCI CONTROLLER
3.3.4 System Pins
Signal
Type
Description
SYSRST#
out
out
System Reset. This low active output is a buffered form of the PCI bus reset, RST#. It
is not synchronized to any clock within the PCI interface controller. Additionally, this
signal can be invoked through software from the PCI host interface.
BPCLK
Buffered PCI Clock. This output is a buffered form of the PCI bus clock and, as such,
has all of the behavioral characteristics of the PCI clock (i.e., DC-to-33 MHz capabil-
ity).
IRQ#
FLT#
out
in
Interrupt. This pin is used to signal the Add-On system that a significant event has
occurred as a result of activity within the PCI controller.
Float. When asserted, all S5933 outputs are floated. This pin has an internal pull-up
resistor.
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