1.6 GBPS QUAD SERIAL BACKPLANE DEVICE
S2009
Figure 11. S2009 Pinout (Top View)
U
T
R
P
N
M
L
K
J
H
G
F
E
D
C
B
A
RCBP
RCBN
ERRC
DOUTB7 DOUTB6 DOUTB2 DOUTB0
EOFB
RCAN
RCAP
ERRB
DOUTA7
DOUTA5
DOUTA6
DOUTA4
DOUTA3
DOUTA2
ERRA
DOUTA1 TTLPWR TTLGND DIGGND DIGPWR
VDDA
RXAP
RXAN
VSS
1
2
DOUTC1
EOFC
KFLAGB
DOUTB4 DOUTB3 DOUTB1
DOUTA0
KFLAGA
TCLKO2
EOFA
TTLGND DIGGND
CMODE
DIGGND
VSSA
LOLA
DIGPWR
TRS
DOUTC4 DOUTC0 DIGGND
KFLAGC TTLPWR DOUTB5 TTLGND
TTLGND DIGPWR
DIGGND CH_LOCK
GND
SYNC
VSSSUB
VSS
3
RCCN
RCCP
EOFD
DOUTC3 TTLGND TTLGND DIGGND TTLGND DIGPWR TTLPWR TTLGND TTLPWR
DOUTC5 DOUTC2 TTLPWR
VDD
4
RXBN
VDD
RXBP
VDDA
VSSSUB
RXCP
RXCN
TMS
5
ERRD
DOUTC6 TTLGND
VDD
6
DOUTD1 KFLAGD DOUTC7 TTLPWR
DOUTD2 DOUTD0 TTLGND TTLPWR
DOUTD5 DOUTD3 DOUTD4 DIGPWR
LOLB
VSSSUB
VDD
NC
VSSA
VSSA
NC
7
VDDA
LOLC
8
9
RCDN
DOUTD7
TCLKA
DINA3
KGENA
DNA
RCDP
DINA0
DINA4
DINA5
DINB0
DINB5
KGENB
DINC1
DOUTD6 DIGGND
TDI
TCK
VSS
10
11
12
13
14
15
16
17
DINA1
DINA6
TCLKB
DINB4
DINB7
DNB
DINA2
DINA7
DINB1
DINB6
TCLKC
DINC3
KGENC
VSSA
RATE
LOLD
RXDP
RXDN
PWR
VSS
VSS
PWR
VDD
CAP1
LPENA
VSSSUB
CAP2
VDDA
VSSSUB
VDD
DINC0
DINC2
DINC6
DNC
DINC5
DINC7
DIND1
DIND3
TCLKD
DIND0
DIND2
DIND7
DIND4
DIND5
DIND6
KGEND
TCLKO
DIGGND
DND
LPEND
TDO
LPENB
LPENC
SQLC_N
SQLD_N
TXCN
SQLA_N
PECL
PWR
PECL
PWR
RESET_N
VSSA
PWR
TXAN
PECL
PWR
PECL
PWR
DINB2
DINB3
PECLGND
SQLB_N PECLGND
VDDA
TXAP
DINC4
DIGPWR REFCLK
TXDN
TXDP
TXCP
TXBN
TXBP
Note: NC used as Test Pins. Do Not Connect.
31
February 9, 2001 / Revision C
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
