Revision J – April 7, 2006
S2004 – Quad Serial Backplane Device
Data Sheet
Figure 19. Receiver Timing (Half Clock Mode, CMODE = 0, TMODE = 1)
SERIAL DATA IN
RCxN
RCxP
DOUTx[0:7], EOFx,
KFLAGx, ERRx
T5
T6
T5
T6
T7
Figure 20. Receiver Timing (External Clock Mode) (TCLKA to DATA Propagation Delay, TMODE = 0)
SERIAL DATA IN
TCLKA
(Input)
DOUTx[0:7], EOFx,
KFLAGx, ERRx
T8
Figure 21. TCLKO Timing
REFCLK
T9
TCLKO
Table 23. S2004 Transmitter (TCLKO Timing)
Parameters
Description
↑ TCLKO w.r.t. ↑ REFCLK
TCLKO Duty Cycle
Min
Max
Units
Conditions
T
9
1.0
6.5
ns
45%
55%
%
Note: Measurements are made at 1.4V level of clocks.
36
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