QT2022/32 - Data Sheet: DS3051
10.7 Register Configuration from External EEPROM
All MDIO registers can be configured through upload from external EEPROMs. This feature can be used to change
the value of any MDIO register from the default without requiring an MDIO command. The new values are
uploaded automatically after chip powerup or reset. This can be used for changing the chip settings from their
default to customize module operation.
Up to two 256-byte external EEPROM devices can be used to configure the MDIO registers. The configuration of
each MDIO register requires 5 bytes of EEPROM space. The maximum number of MDIO registers which can be
configured is 256/5 = 51 per EEPROM device (maximum of 102 registers with two devices). The data structure in
the EEPROM for the MDIO register configuration is shown in Table 37, “Data structure of MDIO register
configuration”.
The 5 bytes of EEPROM memory for each MDIO register must be contiguous. The values must be stored in the
order shown in Table 37. The EEPROM memory space is logically divided into blocks of 5 bytes each, starting at
memory locations 0, 5, 10, 15...250. The 5 bytes of register data must be stored in one of these logical blocks. Any
of these 51 logical blocks may be used. Any block may be used to store data for any valid register. Unused regis-
ters should be set to 00h or FFh. The QT2022/32 will ignore fields where the Device ID or Register Address fields
do not correspond to a defined register. .
Table 37: Data structure of MDIO register configuration
Location
FIELD
0
1
2
3
4
Device ID [7:0]
Register Address[15:8]
Register Address[7:0]
Register Data[15:8]
Register Data[7:0]
The MDIO registers upload configuration capability is indicated by NVR vendor specific register 1.80CFh. Bit 1 is
the register upload configuration enable control for two 256x8 EEPROMs. The lower 3 bits of the first register con-
figuration EEPROM device address are read from 1.80CFh.<4:2> and the lower 3 bits of the second EEPROM
device address are read from 1.80CFh.<7:5>. The upper 4 device address bits are hard-wired to 1010. These two
devices address must not be the same as that of the EEPROM NVR device (i.e. 000) or DOM device as defined in
1.807A.
The upload sequence after powerup is shown in figure 36 on page 92. The EEPROM NVR registers are automati-
cally uploaded after a reset is applied to the QT2022/32. The upload begins 250 ms after the reset function is
completed. This delay allows the external EEPROM NVR device time to stabilize after power up.
After the NVR registers are successfully uploaded following a reset, the QT2022/32 will check if the first EEPROM
and/or the second EEPROM device are configured as present by checking the contents of NVR register 1.80CFh
(EEPROM address C8h). When bit1 is set to 0, it indicates additional EEPROM devices are present. Bits 4:2 store
the address of the first EEPROM device and bits 7:5 store the address of the second EEPROM device. If the
EEPROM devices are indicated as present with valid addresses, the devices will be read and the MDIO registers
set accordingly. If the stored address for either EEPROM device is 000 or 111, the QT2022/32 will not attempt to
read from that device.
When the EEPROM read sequence is complete, the DOM registers will then be uploaded if the DOM device is
present. After reset has completed, the MDIO registers can also be uploaded at any time by issuing a MDIO regis-
ter write of 11 to register 1.C005h.1:0.
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