QT2022/32 - Data Sheet: DS3051
Figure 33: 2-Byte Addressing for EEPROM Read Cycle Timing
lower
address byte
upper
address byte
00000000
data bytes 0 - 7
d7 d6 d1 d0
slave address
slave address
S
1
0
1
0
0
0
0
1
S
1
0
1
0
0
0
0
0
A
A
P
S
O T
O
C P
A
A
0
0 0 0 0 0 0 0
S
T
A
R
T
S
T
A
R
T
A
C
K
A
C
K
A
C
K
R
E
A
D
A
C
K
N
W
R
I
T
E
A
K
PHY
EEPROM
Figure 34: 2-Byte Addressing for DOM Write Cycle Timing
upper
address byte
00000xxx
lower
address byte
data byte 7
data bytes 2 - 6
data byte 0
slave address
S
1
0
1
0
0
0
0
0
d7 d6 d1 d0
A
d7 d6 d1 d0
d7 d6 d1 d0
P
A
A
A
A
A
D D
D
1
0
0
0
0
0
0
2
S
T
O
P
S
T
A
R
T
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
W
R
I
T
E
PHY
EEPROM
Note: Upper 5 address bits can be programmed
in MDIO Register bits 1.C023h.4:0
Figure 35: 2-Byte Addressing for DOM Read Cycle Timing
upper
lower
address byte
address byte
00000xxx
data bytes 0 - 7
d7 d6 d1 d0
slave address
slave address
1
S
1
0
1
0
0 0 0
S
1
0
1
0
0
0
0
0
P
A
A
A
D D
D
1
0
A
0
0
0
0
0
2
S
T
A
R
T
R
E
A
D
S
T
A
R
T
A
C
K
S
T
O
P
A
C
K
A
C
K
A
C
K
N
O
A
C
K
W
R
I
T
E
PHY
EEPROM
Note: Upper 5 address bits can be programmed
in MDIO Register bits 1.C023h.4:0
90
AppliedMicro - Confidential & Proprietary
Revision 5.11
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